[PATCH] board: rockchip: add Pine64 QuartzPro64 RK3588 board
Tom Fitzhenry
tom at tom-fitzhenry.me.uk
Sun Oct 1 16:18:50 CEST 2023
QuartzPro64 is a Rockchip RK3588 based SBC by Pine64.
UART and booting over SD card are tested to work.
Signed-off-by: Tom Fitzhenry <tom at tom-fitzhenry.me.uk>
Cc: Eugen Hristev <eugen.hristev at collabora.com>
Cc: Jonas Karlman <jonas at kwiboo.se>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi | 21 ++++++
arch/arm/dts/rk3588-quartzpro64.dts | 32 +++++++++
arch/arm/mach-rockchip/rk3588/Kconfig | 8 +++
board/pine64/quartzpro64-rk3588/Kconfig | 15 ++++
board/pine64/quartzpro64-rk3588/MAINTAINERS | 8 +++
board/pine64/quartzpro64-rk3588/Makefile | 3 +
.../quartzpro64-rk3588/quartzpro64-rk3588.c | 39 +++++++++++
configs/quartzpro64-rk3588_defconfig | 70 +++++++++++++++++++
doc/board/rockchip/rockchip.rst | 1 +
include/configs/quartzpro64-rk3588.h | 14 ++++
11 files changed, 213 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3588-quartzpro64.dts
create mode 100644 board/pine64/quartzpro64-rk3588/Kconfig
create mode 100644 board/pine64/quartzpro64-rk3588/MAINTAINERS
create mode 100644 board/pine64/quartzpro64-rk3588/Makefile
create mode 100644 board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
create mode 100644 configs/quartzpro64-rk3588_defconfig
create mode 100644 include/configs/quartzpro64-rk3588.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157b..87d1b116960 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -190,7 +190,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6b-io.dtb \
rk3588-evb1-v10.dtb \
rk3588s-rock-5a.dtb \
- rk3588-rock-5b.dtb
+ rk3588-rock-5b.dtb \
+ rk3588-quartzpro64.dtb
dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
diff --git a/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
new file mode 100644
index 00000000000..0c4cb893c35
--- /dev/null
+++ b/arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Google, Inc
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+ aliases {
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc;
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-quartzpro64.dts b/arch/arm/dts/rk3588-quartzpro64.dts
new file mode 100644
index 00000000000..d5d6849e8f8
--- /dev/null
+++ b/arch/arm/dts/rk3588-quartzpro64.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Google, Inc
+ */
+
+/dts-v1/;
+
+#include "rk3588.dtsi"
+
+/ {
+ model = "Pine64 QuartzPro64";
+ compatible = "pine64,quartzpro64", "rockchip,rk3588";
+
+ aliases {
+ mmc1 = &sdmmc;
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:1500000n8";
+ };
+};
+
+&sdmmc {
+ bus-width = <4>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&uart2m0_xfer>;
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
index 79fcc99b898..a0ebcdb2e84 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -80,6 +80,13 @@ config TARGET_ROCK5B_RK3588
USB PD over USB Type-C
Size: 100mm x 72mm (Pico-ITX form factor)
+config TARGET_QUARTZPRO64_RK3588
+ bool "Pine64 QuartzPro64 RK3588 board"
+ select BOARD_LATE_INIT
+ help
+ Pine64 QuartzPro64 is a Rockchip RK3588 based SBC (Single Board
+ Computer) by Pine64.
+
config ROCKCHIP_BOOT_MODE_REG
default 0xfd588080
@@ -93,6 +100,7 @@ config SYS_MALLOC_F_LEN
default 0x80000
source board/edgeble/neural-compute-module-6/Kconfig
+source board/pine64/quartzpro64-rk3588/Kconfig
source board/rockchip/evb_rk3588/Kconfig
source board/radxa/rock5a-rk3588s/Kconfig
source board/radxa/rock5b-rk3588/Kconfig
diff --git a/board/pine64/quartzpro64-rk3588/Kconfig b/board/pine64/quartzpro64-rk3588/Kconfig
new file mode 100644
index 00000000000..96aa7921d32
--- /dev/null
+++ b/board/pine64/quartzpro64-rk3588/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_QUARTZPRO64_RK3588
+
+config SYS_BOARD
+ default "quartzpro64-rk3588"
+
+config SYS_VENDOR
+ default "pine64"
+
+config SYS_CONFIG_NAME
+ default "quartzpro64-rk3588"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/pine64/quartzpro64-rk3588/MAINTAINERS b/board/pine64/quartzpro64-rk3588/MAINTAINERS
new file mode 100644
index 00000000000..a7e944b7478
--- /dev/null
+++ b/board/pine64/quartzpro64-rk3588/MAINTAINERS
@@ -0,0 +1,8 @@
+QUARTZPRO64-RK3588
+M: Tom Fitzhenry <tom at tom-fitzhenry.me.uk>
+S: Maintained
+F: board/pine64/quartzpro64-rk3588
+F: include/configs/quartzpro64-rk3588.h
+F: configs/quartzpro64-rk3588_defconfig
+F: arch/arm/dts/rk3588-quartzpro64.dts
+F: arch/arm/dts/rk3588-quartzpro64-u-boot.dtsi
diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile
new file mode 100644
index 00000000000..47819d9be93
--- /dev/null
+++ b/board/pine64/quartzpro64-rk3588/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y += quartzpro64-rk3588.o
diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
new file mode 100644
index 00000000000..bda804a89e2
--- /dev/null
+++ b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 Google, Inc
+ */
+
+#include <fdtdec.h>
+#include <fdt_support.h>
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob)
+{
+ struct fdt_memory gap1 = {
+ .start = 0x3fc000000,
+ .end = 0x3fc4fffff,
+ };
+ struct fdt_memory gap2 = {
+ .start = 0x3fff00000,
+ .end = 0x3ffffffff,
+ };
+ unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
+ unsigned int ret;
+
+ /*
+ * Inject the reserved-memory nodes into the DTS
+ */
+ ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
+ NULL, flags);
+ if (ret)
+ return ret;
+
+ return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
+ NULL, flags);
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+ return quartzpro64_add_reserved_memory_fdt_nodes(blob);
+}
+#endif
diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig
new file mode 100644
index 00000000000..3bcc54118b3
--- /dev/null
+++ b/configs/quartzpro64-rk3588_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_QUARTZPRO64_RK3588=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index de9fe8e642b..c3fb8a69822 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -112,6 +112,7 @@ List of mainline supported Rockchip boards:
- Rockchip EVB (evb-rk3588)
- Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588)
- Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
+ - Pine64 QuartzPro64 (quartzpro64-rk3588)
- Radxa ROCK 5A (rock5a-rk3588s)
- Radxa ROCK 5B (rock5b-rk3588)
diff --git a/include/configs/quartzpro64-rk3588.h b/include/configs/quartzpro64-rk3588.h
new file mode 100644
index 00000000000..a1faa2aad85
--- /dev/null
+++ b/include/configs/quartzpro64-rk3588.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ * Copyright 2023 Google, Inc
+ */
+
+#ifndef __QUARTZPRO64_RK3588_H
+#define __QUARTZPRO64_RK3588_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
+
+#include <configs/rk3588_common.h>
+
+#endif /* __QUARTZPRO64_RK3588_H */
base-commit: 2173c4a990664d8228d4dadd814bd64fdc12948f
--
2.42.0
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