SSE instructions

Simon Glass sjg at chromium.org
Sun Oct 1 23:08:06 CEST 2023


Hi Bin,

On Thu, 28 Sept 2023 at 08:41, Bin Meng <bmeng.cn at gmail.com> wrote:
>
> Hi Simon,
>
> On Thu, Sep 28, 2023 at 10:20 PM Simon Glass <sjg at chromium.org> wrote:
> >
> > Hi Bin,
> >
> > On Thu, 28 Sept 2023 at 08:15, Bin Meng <bmeng.cn at gmail.com> wrote:
> > >
> > > Hi Simon,
> > >
> > > On Thu, Sep 28, 2023 at 10:41 AM Simon Glass <sjg at chromium.org> wrote:
> > > >
> > > > Hi Bin,
> > > >
> > > > U-Boot 64-bit on x86 disables sse, but when enabling Truetype I get a
> > > > compiler error:
> > > >
> > > > drivers/video/console_truetype.c: In function 'frac':
> > > > drivers/video/console_truetype.c:30:15: error: SSE register return
> > > > with SSE disabled
> > > > 30 | static double frac(double val)
> > > >
> > > > Do you know how to enable SSE for 64-bit?
> > > >
> > >
> > > The following patch could enable SSE for 64-bit:
> > >
> > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > > index 26ec1af2f0..250d7c9948 100644
> > > --- a/arch/x86/config.mk
> > > +++ b/arch/x86/config.mk
> > > @@ -27,7 +27,7 @@ ifeq ($(IS_32BIT),y)
> > >  PLATFORM_CPPFLAGS += -march=i386 -m32
> > >  else
> > >  PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > > -march=core2 -m64
> > > -PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > > +PLATFORM_CPPFLAGS += -mno-mmx
> > >  endif
> > >
> > > However as Heinrich mentioned, U-Boot codes should be written in a
> > > "floating point free" way.
> > >
> > > The fix should really be updating console_truetype.c to use integers
> > > instead of using float/double.
> >
> > Yes, I can do that, but it hangs going into 64-bit mode, which is
> > presumably why the flag was added. In fact it was your commit!
>
> Yeah, indeed it was commit dd4611dea435 ("x86: Ensure no instruction
> sets of MMX/SSE are generated in 64-bit build") and the commit message
> said the reason.
>
> >
> > Is there some missing init somewhere?
> >
>
> I believe we should turn on X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT on CR4
> to enable SSE.

OK thank you, that worked. I will send a few patches.

Regards,
Simon


More information about the U-Boot mailing list