[PATCH v3 6/8] a1: clk: Add missing USB_PHY_IN and USB_PHY gates
Alexey Romanov
avromanov at salutedevices.com
Thu Oct 5 10:54:27 CEST 2023
From: Igor Prusov <ivprusov at salutedevices.com>
We use this clocks in dwc3 driver.
Signed-off-by: Igor Prusov <ivprusov at salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov at salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
---
drivers/clk/meson/a1.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/meson/a1.c b/drivers/clk/meson/a1.c
index 3aec42f33b..1075ba7333 100644
--- a/drivers/clk/meson/a1.c
+++ b/drivers/clk/meson/a1.c
@@ -238,6 +238,12 @@ static const struct meson_clk_info *meson_clocks[] = {
[CLKID_FIXPLL_IN] = CLK_GATE("fixpll_in", A1_SYS_OSCIN_CTRL, 1,
EXTERNAL_XTAL
),
+ [CLKID_USB_PHY_IN] = CLK_GATE("usb_phy_in", A1_SYS_OSCIN_CTRL, 2,
+ EXTERNAL_XTAL
+ ),
+ [CLKID_USB_PHY] = CLK_GATE("usb_phy", A1_SYS_CLK_EN0, 27,
+ CLKID_SYS
+ ),
[CLKID_SARADC] = CLK_GATE("saradc", A1_SAR_ADC_CLK_CTR, 8,
-ENOENT
),
--
2.25.1
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