[PATCH v2 2/2] arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe
Kever Yang
kever.yang at rock-chips.com
Sat Oct 7 04:39:33 CEST 2023
On 2023/9/5 19:47, FUKAUMI Naoki wrote:
> this patch adds support for PCIe3 (M.2 M key) and enables NVMe.
>
> => pci
> BusDevFun VendorId DeviceId Device Class Sub-Class
> _____________________________________________________________
> 00.00.00 0x1d87 0x3588 Bridge device 0x04
> 01.00.00 0x10ec 0x8125 Network controller 0x00
> 02.00.00 0x1d87 0x3588 Bridge device 0x04
> 03.00.00 0x1179 0x011a Mass storage controller 0x08
> => nvme scan
> => nvme info
> Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN
> Type: Hard Disk
> Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
>
> Signed-off-by: FUKAUMI Naoki <naoki at radxa.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
>
> this patch depends:
> - "rockchip: rk3568: Fix use of PCIe bifurcation" [1]
> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=366997
> ---
> arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 33 +++++++++++++++++++++++++
> configs/rock5b-rk3588_defconfig | 1 +
> 2 files changed, 34 insertions(+)
>
> diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> index 03626e71ea..96cc84e5aa 100644
> --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
> @@ -23,6 +23,19 @@
> regulator-max-microvolt = <12000000>;
> };
>
> + vcc3v3_pcie30: vcc3v3-pcie30-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3_pcie30";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + enable-active-high;
> + gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
> + startup-delay-us = <5000>;
> + vin-supply = <&vcc5v0_sys>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie3_vcc3v3_en>;
> + };
> +
> vcc5v0_usbdcin: vcc5v0-usbdcin {
> compatible = "regulator-fixed";
> regulator-name = "vcc5v0_usbdcin";
> @@ -71,6 +84,18 @@
> status = "okay";
> };
>
> +&pcie30phy {
> + status = "okay";
> +};
> +
> +&pcie3x4 {
> + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie30>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie3_rst>;
> + status = "okay";
> +};
> +
> &pinctrl {
> pcie {
> pcie_reset_h: pcie-reset-h {
> @@ -81,6 +106,14 @@
> rockchip,pins = <3 RK_PC7 4 &pcfg_pull_none>,
> <3 RK_PD0 4 &pcfg_pull_none>;
> };
> +
> + pcie3_rst: pcie3-rst {
> + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie3_vcc3v3_en: pcie3-vcc3v3-en {
> + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> };
>
> usb-typec {
> diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
> index 3fa65cbf9b..50551c70f2 100644
> --- a/configs/rock5b-rk3588_defconfig
> +++ b/configs/rock5b-rk3588_defconfig
> @@ -81,6 +81,7 @@ CONFIG_SPI_FLASH_XTX=y
> CONFIG_ETH_DESIGNWARE=y
> CONFIG_RTL8169=y
> CONFIG_GMAC_ROCKCHIP=y
> +CONFIG_NVME_PCI=y
> CONFIG_PCIE_DW_ROCKCHIP=y
> CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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