[PATCH v5 10/11] ram: starfive: Read memory size information from EEPROM

[Heinrich Schuchardt]

On 11.10.23 04:54, Heinrich Schuchardt wrote:
> On 15.06.23 11:36, Yanhong Wang wrote:
>> StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of
>> DDR capacity includes 2G/4G/8G, a DT can not support multiple
>> capacities, so the capacity size information is recorded to EEPROM, when
>> DDR initialization required capacity size information is read from
>> EEPROM.
>>
>> If there is no information in EEPROM, it is initialized with the default
>> size defined in DT.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang at starfivetech.com>
>> Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>
>> ---
>>   arch/riscv/cpu/jh7110/spl.c         | 32 ++++++++++++++++++++++++++++-
>>   drivers/ram/starfive/starfive_ddr.c |  2 --
>>   2 files changed, 31 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/riscv/cpu/jh7110/spl.c b/arch/riscv/cpu/jh7110/spl.c
>> index 104f0fe949..72adcefa0e 100644
>> --- a/arch/riscv/cpu/jh7110/spl.c
>> +++ b/arch/riscv/cpu/jh7110/spl.c
>> @@ -3,19 +3,49 @@
>>    * Copyright (C) 2022 StarFive Technology Co., Ltd.
>>    * Author: Yanhong Wang<yanhong.wang at starfivetech.com>
>>    */
>> -
>> +#include <common.h>
>> +#include <asm/arch/eeprom.h>
>>   #include <asm/csr.h>
>>   #include <asm/sections.h>
>>   #include <dm.h>
>> +#include <linux/sizes.h>
>>   #include <log.h>
>> +#include <init.h>
>>   #define CSR_U74_FEATURE_DISABLE    0x7c1
>>   #define L2_LIM_MEM_END    0x81FFFFFUL
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>> +static bool check_ddr_size(phys_size_t size)
>> +{
>> +    switch (size) {
>> +    case SZ_2:
>> +    case SZ_4:
>> +    case SZ_8:
>> +    case SZ_16:
>> +        return true;
>> +    default:
>> +        return false;
>> +    }
>> +}
>> +
>>   int spl_soc_init(void)
>>   {
>>       int ret;
>>       struct udevice *dev;
>> +    phys_size_t size;
>> +
>> +    ret = fdtdec_setup_mem_size_base();
>> +    if (ret)
>> +        return ret;
>> +
>> +    /* Read the definition of the DDR size from eeprom, and if not,
>> +     * use the definition in DT
>> +     */
>> +    size = (get_ddr_size_from_eeprom() >> 16) & 0xFF;
> 
> On origin/master for a 4 GiB board with a serial number 
> VF7110B1-2253-D004E000-4000xxxx this always fails. This results in 
> memory reported as 8 GiB and Linux crashing.
> 
> i2c_get_chip_for_busnum() returns -EINVAL in read_eeprom() 
> [board/starfive/visionfive2/visionfive2-i2c-eeprom.c:335].
> 
> Is the driver model really expected to be fully initialized before 
> setting up memory?
> 
> Best regards
> 
> Heinrich

The root cause seems to be in dw_i2c_calc_timing(). Probing of the 
i2c_designware device fails with:

dw_i2c: mode 0, ic_clk 1000000, speed 100000, period 10 rise 1 fall 1 
tlow 5 thigh 4 spk 0
dw_i2c: bad counts. hcnt = -4 lcnt = 4
device_probe: i2c at 12050000 failed to probe -22

When I change the hcnt timing calculation, by replacing the offset of 7 
to 1, the device is probed correctly and I get the correct memory size 
for my board.

Best regards

Heinrich


> 
>> +    if (check_ddr_size(size))
>> +        gd->ram_size = size << 30;
>>       /* DDR init */
>>       ret = uclass_get_device(UCLASS_RAM, 0, &dev);
>> diff --git a/drivers/ram/starfive/starfive_ddr.c 
>> b/drivers/ram/starfive/starfive_ddr.c
>> index 553f2ce6f4..a0a3d6b33d 100644
>> --- a/drivers/ram/starfive/starfive_ddr.c
>> +++ b/drivers/ram/starfive/starfive_ddr.c
>> @@ -72,8 +72,6 @@ static int starfive_ddr_probe(struct udevice *dev)
>>       u64 rate;
>>       int ret;
>> -    /* Read memory base and size from DT */
>> -    fdtdec_setup_mem_size_base();
>>       priv->info.base = gd->ram_base;
>>       priv->info.size = gd->ram_size;
>