[PATCH v4 1/1] board: rockchip: add FriendlyElec NanoPC-T6 rk3588 board
Kever Yang
kever.yang at rock-chips.com
Fri Oct 13 09:16:24 CEST 2023
On 2023/10/13 09:19, John Clark wrote:
> The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.
>
> There are four variants depending on the DRAM size: 4G/32GB eMMC,
> 8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR
>
> Specifications:
> CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz)
> + 4x Cortex-A55 (up to 1.8GHz)
> GPU: Mali-G610 MP4
> VPU: 8K at 60fps H.265 and VP9 decoder, 8K at 30fps H.264 decoder,
> 4K at 60fps AV1 decoder, 8K at 30fps H.264 and H.265 encoder
> NPU: 6TOPs, supports INT4/INT8/INT16/FP16
> RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz
> eMMC: 0GB/32GB/64GB/256GB HS400
> MicroSD Slot: MicroSD SDR104
> PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s
> Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG)
> PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
> supports M.2 WiFi and Bluetooth
> 4G Module: MiniPCIe x1, MicroSIM Card Slot x1
> Audio Out: 3.5mm jack for stereo headphone output
> Audio In: 2.0mm PH-2A connector for analog microphone input
> Video Input: standard HDMI input port, up to 4Kp60
> 2x 4-lane MIPI-CSI, compatible with MIPI V1.2
> Video Output: 2x standard HDMI output ports compatible with HDMI2.1,
> HDMI2.0, and HDMI1.4
> 2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
> USB-A: USB 3.0, Type A
> USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
> 40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
> 8x PWMs, 2x I2Ss, 28x GPIOs
> Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps
> Onboard IR receiver: 38KHz carrier frequency
> RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power
> RTC IC HYM8563TS
> 5V Fan connector
> Working Temperature: 0C to 70C
> Power: 5.5*2.1mm DC Jack, 12VDC input
> Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
>
> Kernel commits:
> 893c17716d0c ("arm64: dts: rockchip: Add NanoPC T6")
> a721e28dfad2 ("arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support")
> ac76b786cc37 ("arm64: dts: rockchip: Add NanoPC T6 PCIe e-key support")
>
> Signed-off-by: John Clark <inindev at gmail.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
>
> ---
>
> Changes in v4:
> - removed SPI support as Jonas Karlman will be providing a comprehensive solution to support all rk3588 iomux variations.
>
> Changes in v3:
> - The vendor device tree uses "FriendlyElec NanoPC-T6" therefore, use FriendlyElec over FriendlyARM.
> - Bug: use IS_ENABLED(CONFIG_TARGET_NANOPCT6_RK3588) rather than CONFIG_IS_ENABLED(TARGET_NANOPCT6_RK3588)
>
> Changes in v2:
> - resync dt from linux next
> - config changes:
> -CONFIG_PCI_INIT_R=y
> -CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> -CONFIG_REGULATOR_PWM=y
> -# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
> -CONFIG_SPL_USB_DWC3_GENERIC=y
> - added board files:
> Kconfig, MAINTAINERS, Makefile, nanopct6-rk3588.c, nanopct6-rk3588.h
> - improved BROM_LAST_BOOTSOURCE handling for SPI NOR
>
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi | 36 +
> arch/arm/dts/rk3588-nanopc-t6.dts | 916 ++++++++++++++++++
> arch/arm/mach-rockchip/rk3588/Kconfig | 46 +
> board/friendlyelec/nanopc-t6-rk3588/Kconfig | 15 +
> .../friendlyelec/nanopc-t6-rk3588/MAINTAINERS | 9 +
> board/friendlyelec/nanopc-t6-rk3588/Makefile | 6 +
> .../nanopc-t6-rk3588/nanopc-t6-rk3588.c | 39 +
> configs/nanopc-t6-rk3588_defconfig | 108 +++
> doc/board/rockchip/rockchip.rst | 1 +
> include/configs/nanopc-t6-rk3588.h | 15 +
> 11 files changed, 1192 insertions(+)
> create mode 100644 arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> create mode 100644 arch/arm/dts/rk3588-nanopc-t6.dts
> create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Kconfig
> create mode 100644 board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS
> create mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
> create mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
> create mode 100644 configs/nanopc-t6-rk3588_defconfig
> create mode 100644 include/configs/nanopc-t6-rk3588.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index fba7dfed26..46f6d5225d 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -190,6 +190,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
> rk3588-edgeble-neu6a-io.dtb \
> rk3588-edgeble-neu6b-io.dtb \
> rk3588-evb1-v10.dtb \
> + rk3588-nanopc-t6.dtb \
> rk3588s-rock-5a.dtb \
> rk3588-rock-5b.dtb
>
> diff --git a/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> new file mode 100644
> index 0000000000..87831c9d43
> --- /dev/null
> +++ b/arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> @@ -0,0 +1,36 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2023 John Clark <inindev at gmail.com>
> + *
> + */
> +
> +#include "rk3588-u-boot.dtsi"
> +
> +/ {
> + chosen {
> + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
> + };
> +};
> +
> +&fspim1_pins {
> + bootph-all;
> +};
> +
> +&sfc {
> + bootph-pre-ram;
> + u-boot,spl-sfc-no-dma;
> + pinctrl-names = "default";
> + pinctrl-0 = <&fspim1_pins>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash at 0 {
> + bootph-pre-ram;
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <24000000>;
> + spi-rx-bus-width = <4>;
> + spi-tx-bus-width = <1>;
> + };
> +};
> diff --git a/arch/arm/dts/rk3588-nanopc-t6.dts b/arch/arm/dts/rk3588-nanopc-t6.dts
> new file mode 100644
> index 0000000000..97af4f9128
> --- /dev/null
> +++ b/arch/arm/dts/rk3588-nanopc-t6.dts
> @@ -0,0 +1,916 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2023 Thomas McKahan
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +#include <dt-bindings/usb/pd.h>
> +#include "rk3588.dtsi"
> +
> +/ {
> + model = "FriendlyElec NanoPC-T6";
> + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588";
> +
> + aliases {
> + mmc0 = &sdhci;
> + mmc1 = &sdmmc;
> + serial2 = &uart2;
> + };
> +
> + chosen {
> + stdout-path = "serial2:1500000n8";
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + sys_led: led-0 {
> + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
> + label = "system-led";
> + linux,default-trigger = "heartbeat";
> + pinctrl-names = "default";
> + pinctrl-0 = <&sys_led_pin>;
> + };
> +
> + usr_led: led-1 {
> + gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
> + label = "user-led";
> + pinctrl-names = "default";
> + pinctrl-0 = <&usr_led_pin>;
> + };
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + pinctrl-names = "default";
> + pinctrl-0 = <&hp_det>;
> +
> + simple-audio-card,name = "realtek,rt5616-codec";
> + simple-audio-card,format = "i2s";
> + simple-audio-card,mclk-fs = <256>;
> +
> + simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
> + simple-audio-card,hp-pin-name = "Headphones";
> +
> + simple-audio-card,widgets =
> + "Headphone", "Headphones",
> + "Microphone", "Microphone Jack";
> + simple-audio-card,routing =
> + "Headphones", "HPOL",
> + "Headphones", "HPOR",
> + "MIC1", "Microphone Jack",
> + "Microphone Jack", "micbias1";
> +
> + simple-audio-card,cpu {
> + sound-dai = <&i2s0_8ch>;
> + };
> + simple-audio-card,codec {
> + sound-dai = <&rt5616>;
> + };
> + };
> +
> + vcc12v_dcin: vcc12v-dcin-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc12v_dcin";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + };
> +
> + /* vcc5v0_sys powers peripherals */
> + vcc5v0_sys: vcc5v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc5v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + /* vcc4v0_sys powers the RK806, RK860's */
> + vcc4v0_sys: vcc4v0-sys-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc4v0_sys";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <4000000>;
> + regulator-max-microvolt = <4000000>;
> + vin-supply = <&vcc12v_dcin>;
> + };
> +
> + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc-1v1-nldo-s3";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1100000>;
> + regulator-max-microvolt = <1100000>;
> + vin-supply = <&vcc4v0_sys>;
> + };
> +
> + vcc_3v3_pcie20: vcc3v3-pcie20-regulator {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc_3v3_pcie20";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc_3v3_s3>;
> + };
> +
> + vbus5v0_typec: vbus5v0-typec-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&typec5v_pwren>;
> + regulator-name = "vbus5v0_typec";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_m2_1_pwren>;
> + regulator-name = "vcc3v3_pcie2x1l0";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +
> + vcc3v3_pcie30: vcc3v3-pcie30-regulator {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie_m2_0_pwren>;
> + regulator-name = "vcc3v3_pcie30";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&vcc5v0_sys>;
> + };
> +};
> +
> +&combphy0_ps {
> + status = "okay";
> +};
> +
> +&combphy1_ps {
> + status = "okay";
> +};
> +
> +&combphy2_psu {
> + status = "okay";
> +};
> +
> +&cpu_l0 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l1 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l2 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_l3 {
> + cpu-supply = <&vdd_cpu_lit_s0>;
> +};
> +
> +&cpu_b0{
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b1{
> + cpu-supply = <&vdd_cpu_big0_s0>;
> +};
> +
> +&cpu_b2{
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&cpu_b3{
> + cpu-supply = <&vdd_cpu_big1_s0>;
> +};
> +
> +&gpio0 {
> + gpio-line-names = /* GPIO0 A0-A7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO0 B0-B7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO0 C0-C7 */
> + "", "", "", "",
> + "HEADER_10", "HEADER_08", "HEADER_32", "",
> + /* GPIO0 D0-D7 */
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpio1 {
> + gpio-line-names = /* GPIO1 A0-A7 */
> + "HEADER_27", "HEADER_28", "", "",
> + "", "", "", "HEADER_15",
> + /* GPIO1 B0-B7 */
> + "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23",
> + "HEADER_24", "HEADER_22", "", "",
> + /* GPIO1 C0-C7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO1 D0-D7 */
> + "", "", "", "",
> + "", "", "HEADER_05", "HEADER_03";
> +};
> +
> +&gpio2 {
> + gpio-line-names = /* GPIO2 A0-A7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO2 B0-B7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO2 C0-C7 */
> + "", "CSI1_11", "CSI1_12", "",
> + "", "", "", "",
> + /* GPIO2 D0-D7 */
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&gpio3 {
> + gpio-line-names = /* GPIO3 A0-A7 */
> + "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36",
> + "HEADER_37", "", "DSI0_12", "",
> + /* GPIO3 B0-B7 */
> + "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16",
> + "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12",
> + /* GPIO3 C0-C7 */
> + "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13",
> + "", "", "", "",
> + /* GPIO3 D0-D7 */
> + "", "", "", "",
> + "", "DSI1_10", "", "";
> +};
> +
> +&gpio4 {
> + gpio-line-names = /* GPIO4 A0-A7 */
> + "DSI1_08", "DSI1_14", "", "DSI1_12",
> + "", "", "", "",
> + /* GPIO4 B0-B7 */
> + "", "", "", "",
> + "", "", "", "",
> + /* GPIO4 C0-C7 */
> + "", "", "", "",
> + "CSI0_11", "CSI0_12", "", "",
> + /* GPIO4 D0-D7 */
> + "", "", "", "",
> + "", "", "", "";
> +};
> +
> +&i2c0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c0m2_xfer>;
> + status = "okay";
> +
> + vdd_cpu_big0_s0: regulator at 42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big0_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc4v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_big1_s0: regulator at 43 {
> + compatible = "rockchip,rk8603", "rockchip,rk8602";
> + reg = <0x43>;
> + fcs,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_cpu_big1_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <1050000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc4v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
> +
> + vdd_npu_s0: regulator at 42 {
> + compatible = "rockchip,rk8602";
> + reg = <0x42>;
> + rockchip,suspend-voltage-selector = <1>;
> + regulator-name = "vdd_npu_s0";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <2300>;
> + vin-supply = <&vcc4v0_sys>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +};
> +
> +&i2c6 {
> + clock-frequency = <200000>;
> + status = "okay";
> +
> + fusb302: typec-portc at 22 {
> + compatible = "fcs,fusb302";
> + reg = <0x22>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
> + pinctrl-0 = <&usbc0_int>;
> + pinctrl-names = "default";
> + vbus-supply = <&vbus5v0_typec>;
> +
> + connector {
> + compatible = "usb-c-connector";
> + data-role = "dual";
> + label = "USB-C";
> + power-role = "dual";
> + try-power-role = "sink";
> + source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
> + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
> + op-sink-microwatt = <1000000>;
> + };
> + };
> +
> + hym8563: rtc at 51 {
> + compatible = "haoyu,hym8563";
> + reg = <0x51>;
> + #clock-cells = <0>;
> + clock-output-names = "hym8563";
> + pinctrl-names = "default";
> + pinctrl-0 = <&hym8563_int>;
> + interrupt-parent = <&gpio0>;
> + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
> + wakeup-source;
> + };
> +};
> +
> +&i2c7 {
> + clock-frequency = <200000>;
> + status = "okay";
> +
> + rt5616: codec at 1b {
> + compatible = "realtek,rt5616";
> + reg = <0x1b>;
> + clocks = <&cru I2S0_8CH_MCLKOUT>;
> + clock-names = "mclk";
> + #sound-dai-cells = <0>;
> + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
> + assigned-clock-rates = <12288000>;
> +
> + port {
> + rt5616_p0_0: endpoint {
> + remote-endpoint = <&i2s0_8ch_p0_0>;
> + };
> + };
> + };
> +
> + /* connected with MIPI-CSI1 */
> +};
> +
> +&i2c8 {
> + pinctrl-0 = <&i2c8m2_xfer>;
> +};
> +
> +&i2s0_8ch {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s0_lrck
> + &i2s0_mclk
> + &i2s0_sclk
> + &i2s0_sdi0
> + &i2s0_sdo0>;
> + status = "okay";
> +
> + i2s0_8ch_p0: port {
> + i2s0_8ch_p0_0: endpoint {
> + dai-format = "i2s";
> + mclk-fs = <256>;
> + remote-endpoint = <&rt5616_p0_0>;
> + };
> + };
> +};
> +
> +&pcie2x1l0 {
> + reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3_pcie20>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_0_rst>;
> + status = "okay";
> +};
> +
> +&pcie2x1l1 {
> + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_1_rst>;
> + status = "okay";
> +};
> +
> +&pcie2x1l2 {
> + reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc_3v3_pcie20>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie2_2_rst>;
> + status = "okay";
> +};
> +
> +&pcie30phy {
> + status = "okay";
> +};
> +
> +&pcie3x4 {
> + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> + vpcie3v3-supply = <&vcc3v3_pcie30>;
> + status = "okay";
> +};
> +
> +&pinctrl {
> + gpio-leds {
> + sys_led_pin: sys-led-pin {
> + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + usr_led_pin: usr-led-pin {
> + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + headphone {
> + hp_det: hp-det {
> + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + hym8563 {
> + hym8563_int: hym8563-int {
> + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +
> + pcie {
> + pcie2_0_rst: pcie2-0-rst {
> + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie2_1_rst: pcie2-1-rst {
> + rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie2_2_rst: pcie2-2-rst {
> + rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie_m2_0_pwren: pcie-m20-pwren {
> + rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + pcie_m2_1_pwren: pcie-m21-pwren {
> + rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> + };
> +
> + usb {
> + typec5v_pwren: typec5v-pwren {
> + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
> + };
> +
> + usbc0_int: usbc0-int {
> + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
> + };
> + };
> +};
> +
> +&pwm1 {
> + pinctrl-0 = <&pwm1m1_pins>;
> + status = "okay";
> +};
> +
> +&saradc {
> + vref-supply = <&avcc_1v8_s0>;
> + status = "okay";
> +};
> +
> +&sdhci {
> + bus-width = <8>;
> + no-sdio;
> + no-sd;
> + non-removable;
> + max-frequency = <200000000>;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> + status = "okay";
> +};
> +
> +&sdmmc {
> + max-frequency = <200000000>;
> + no-sdio;
> + no-mmc;
> + bus-width = <4>;
> + cap-mmc-highspeed;
> + cap-sd-highspeed;
> + disable-wp;
> + sd-uhs-sdr104;
> + vmmc-supply = <&vcc_3v3_s3>;
> + vqmmc-supply = <&vccio_sd_s0>;
> + status = "okay";
> +};
> +
> +&spi2 {
> + status = "okay";
> + assigned-clocks = <&cru CLK_SPI2>;
> + assigned-clock-rates = <200000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
> + num-cs = <1>;
> +
> + pmic at 0 {
> + compatible = "rockchip,rk806";
> + spi-max-frequency = <1000000>;
> + reg = <0x0>;
> +
> + interrupt-parent = <&gpio0>;
> + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> +
> + vcc1-supply = <&vcc4v0_sys>;
> + vcc2-supply = <&vcc4v0_sys>;
> + vcc3-supply = <&vcc4v0_sys>;
> + vcc4-supply = <&vcc4v0_sys>;
> + vcc5-supply = <&vcc4v0_sys>;
> + vcc6-supply = <&vcc4v0_sys>;
> + vcc7-supply = <&vcc4v0_sys>;
> + vcc8-supply = <&vcc4v0_sys>;
> + vcc9-supply = <&vcc4v0_sys>;
> + vcc10-supply = <&vcc4v0_sys>;
> + vcc11-supply = <&vcc_2v0_pldo_s3>;
> + vcc12-supply = <&vcc4v0_sys>;
> + vcc13-supply = <&vcc_1v1_nldo_s3>;
> + vcc14-supply = <&vcc_1v1_nldo_s3>;
> + vcca-supply = <&vcc4v0_sys>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + rk806_dvs1_null: dvs1-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs2_null: dvs2-null-pins {
> + pins = "gpio_pwrctrl2";
> + function = "pin_fun0";
> + };
> +
> + rk806_dvs3_null: dvs3-null-pins {
> + pins = "gpio_pwrctrl3";
> + function = "pin_fun0";
> + };
> +
> + regulators {
> + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_gpu_s0";
> + regulator-enable-ramp-delay = <400>;
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_cpu_lit_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_log_s0: dcdc-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <675000>;
> + regulator-max-microvolt = <750000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_log_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <550000>;
> + regulator-max-microvolt = <950000>;
> + regulator-init-microvolt = <750000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_vdenc_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_ddr_s0: dcdc-reg5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <675000>;
> + regulator-max-microvolt = <900000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_ddr_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <850000>;
> + };
> + };
> +
> + vdd2_ddr_s3: dcdc-reg6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vdd2_ddr_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vcc_2v0_pldo_s3: dcdc-reg7 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <2000000>;
> + regulator-max-microvolt = <2000000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vdd_2v0_pldo_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <2000000>;
> + };
> + };
> +
> + vcc_3v3_s3: dcdc-reg8 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-name = "vcc_3v3_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <3300000>;
> + };
> + };
> +
> + vddq_ddr_s0: dcdc-reg9 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-name = "vddq_ddr_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s3: dcdc-reg10 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + avcc_1v8_s0: pldo-reg1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "avcc_1v8_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_1v8_s0: pldo-reg2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "vcc_1v8_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + avdd_1v2_s0: pldo-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + regulator-name = "avdd_1v2_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vcc_3v3_s0: pldo-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vcc_3v3_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vccio_sd_s0: pldo-reg5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-ramp-delay = <12500>;
> + regulator-name = "vccio_sd_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + pldo6_s3: pldo-reg6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-name = "pldo6_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <1800000>;
> + };
> + };
> +
> + vdd_0v75_s3: nldo-reg1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> + regulator-name = "vdd_0v75_s3";
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-suspend-microvolt = <750000>;
> + };
> + };
> +
> + vdd_ddr_pll_s0: nldo-reg2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + regulator-name = "vdd_ddr_pll_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + regulator-suspend-microvolt = <850000>;
> + };
> + };
> +
> + avdd_0v75_s0: nldo-reg3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> + regulator-name = "avdd_0v75_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_0v85_s0: nldo-reg4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <850000>;
> + regulator-max-microvolt = <850000>;
> + regulator-name = "vdd_0v85_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> +
> + vdd_0v75_s0: nldo-reg5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <750000>;
> + regulator-max-microvolt = <750000>;
> + regulator-name = "vdd_0v75_s0";
> +
> + regulator-state-mem {
> + regulator-off-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&tsadc {
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-0 = <&uart2m0_xfer>;
> + status = "okay";
> +};
> +
> +&u2phy2_host {
> + status = "okay";
> +};
> +
> +&u2phy3_host {
> + status = "okay";
> +};
> +
> +&u2phy2 {
> + status = "okay";
> +};
> +
> +&u2phy3 {
> + status = "okay";
> +};
> +
> +&usb_host0_ehci {
> + status = "okay";
> +};
> +
> +&usb_host0_ohci {
> + status = "okay";
> +};
> +
> +&usb_host1_ehci {
> + status = "okay";
> +};
> +
> +&usb_host1_ohci {
> + status = "okay";
> +};
> diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig
> index 79fcc99b89..1ff6b7d2cd 100644
> --- a/arch/arm/mach-rockchip/rk3588/Kconfig
> +++ b/arch/arm/mach-rockchip/rk3588/Kconfig
> @@ -6,6 +6,51 @@ config TARGET_EVB_RK3588
> help
> RK3588 EVB is a evaluation board for Rockchp RK3588.
>
> +config TARGET_NANOPCT6_RK3588
> + bool "FriendlyElec NanoPC-T6 RK3588 board"
> + select BOARD_LATE_INIT
> + help
> + The NanoPC-T6 is a Rockchip RK3588 based SBC by FriendlyElec.
> +
> + There are four variants depending on the DRAM size: 4G/32GB eMMC,
> + 8G/64GB eMMC, 16G/16MB SPI NOR, and 16G/256GB eMMC/16MB SPI NOR
> +
> + Specifications:
> +
> + CPU: Rockchip RK3588, 4x Cortex-A76 (up to 2.4GHz)
> + + 4x Cortex-A55 (up to 1.8GHz)
> + GPU: Mali-G610 MP4
> + VPU: 8K at 60fps H.265 and VP9 decoder, 8K at 30fps H.264 decoder,
> + 4K at 60fps AV1 decoder, 8K at 30fps H.264 and H.265 encoder
> + NPU: 6TOPs, supports INT4/INT8/INT16/FP16
> + RAM: 64-bit 4GB/8GB/16GB LPDDR4X at 2133MHz
> + eMMC: 0GB/32GB/64GB/256GB HS400
> + MicroSD Slot: MicroSD SDR104
> + PCIe 3.0: M.2 M-Key x1, PCIe 3.0 x4 for NVMe SSDs up to 2,500 MB/s
> + Ethernet: PCIe 2.5G 2x Ethernet (RTL8125BG)
> + PCIe 2.1: M.2 E-Key x1, PCIe 2.1 x1 and USB2.0 Host,
> + supports M.2 WiFi and Bluetooth
> + 4G Module: MiniPCIe x1, MicroSIM Card Slot x1
> + Audio Out: 3.5mm jack for stereo headphone output
> + Audio In: 2.0mm PH-2A connector for analog microphone input
> + Video Input: standard HDMI input port, up to 4Kp60
> + 2x 4-lane MIPI-CSI, compatible with MIPI V1.2
> + Video Output: 2x standard HDMI output ports compatible with HDMI2.1,
> + HDMI2.0, and HDMI1.4
> + 2x 4-lane MIPI-DSI, compatible with MIPI DPHY 2.0 or CPHY 1.1
> + USB-A: USB 3.0, Type A
> + USB-C: Full function USB Type‑C port, DP display up to 4Kp60, USB 3.0
> + 40-pin 2.54mm header connector: up to 2x SPIs, 6x UARTs, 1x I2Cs,
> + 8x PWMs, 2x I2Ss, 28x GPIOs
> + Debug UART: 3 Pin 2.54mm header, 3V level, 1500000bps
> + Onboard IR receiver: 38KHz carrier frequency
> + RTC Battery: 2 Pin 1.27/1.25mm RTC battery connector for low power
> + RTC IC HYM8563TS
> + 5V Fan connector
> + Working Temperature: 0C to 70C
> + Power: 5.5*2.1mm DC Jack, 12VDC input
> + Dimensions: 110x80x1.6mm (without case) / 86x114.5x30mm (with case)
> +
> config TARGET_RK3588_NEU6
> bool "Edgeble Neural Compute Module 6(Neu6) SoM"
> select BOARD_LATE_INIT
> @@ -93,6 +138,7 @@ config SYS_MALLOC_F_LEN
> default 0x80000
>
> source board/edgeble/neural-compute-module-6/Kconfig
> +source board/friendlyelec/nanopc-t6-rk3588/Kconfig
> source board/rockchip/evb_rk3588/Kconfig
> source board/radxa/rock5a-rk3588s/Kconfig
> source board/radxa/rock5b-rk3588/Kconfig
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/Kconfig b/board/friendlyelec/nanopc-t6-rk3588/Kconfig
> new file mode 100644
> index 0000000000..032ef48610
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/Kconfig
> @@ -0,0 +1,15 @@
> +if TARGET_NANOPCT6_RK3588
> +
> +config SYS_BOARD
> + default "nanopc-t6-rk3588"
> +
> +config SYS_VENDOR
> + default "friendlyelec"
> +
> +config SYS_CONFIG_NAME
> + default "nanopc-t6-rk3588"
> +
> +config BOARD_SPECIFIC_OPTIONS # dummy
> + def_bool y
> +
> +endif
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS b/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS
> new file mode 100644
> index 0000000000..63ff6fafc8
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/MAINTAINERS
> @@ -0,0 +1,9 @@
> +NANOPCT6-RK3588
> +M: John Clark <inindev at gmail.com>
> +R: Jonas Karlman <jonas at kwiboo.se>
> +S: Maintained
> +F: board/friendlyelec/nanopc-t6-rk3588
> +F: include/configs/nanopc-t6-rk3588.h
> +F: configs/nanopc-t6-rk3588_defconfig
> +F: arch/arm/dts/rk3588-nanopc-t6.dts
> +F: arch/arm/dts/rk3588-nanopc-t6-u-boot.dtsi
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile
> new file mode 100644
> index 0000000000..c1c49b1970
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
> +#
> +
> +obj-y += nanopc-t6-rk3588.o
> diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
> new file mode 100644
> index 0000000000..99bbef964e
> --- /dev/null
> +++ b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
> @@ -0,0 +1,39 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
> + */
> +
> +#include <fdtdec.h>
> +#include <fdt_support.h>
> +
> +#ifdef CONFIG_OF_BOARD_SETUP
> +int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob)
> +{
> + struct fdt_memory gap1 = {
> + .start = 0x3fc000000,
> + .end = 0x3fc4fffff,
> + };
> + struct fdt_memory gap2 = {
> + .start = 0x3fff00000,
> + .end = 0x3ffffffff,
> + };
> + unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
> + unsigned int ret;
> +
> + /*
> + * Inject the reserved-memory nodes into the DTS
> + */
> + ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
> + NULL, flags);
> + if (ret)
> + return ret;
> +
> + return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
> + NULL, flags);
> +}
> +
> +int ft_board_setup(void *blob, struct bd_info *bd)
> +{
> + return nanopc_t6_add_reserved_memory_fdt_nodes(blob);
> +}
> +#endif
> diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig
> new file mode 100644
> index 0000000000..070399ce2a
> --- /dev/null
> +++ b/configs/nanopc-t6-rk3588_defconfig
> @@ -0,0 +1,108 @@
> +CONFIG_ARM=y
> +CONFIG_SKIP_LOWLEVEL_INIT=y
> +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
> +CONFIG_COUNTER_FREQUENCY=24000000
> +CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_TEXT_BASE=0x00a00000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
> +CONFIG_SF_DEFAULT_SPEED=24000000
> +CONFIG_SF_DEFAULT_MODE=0x2000
> +CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6"
> +CONFIG_ROCKCHIP_RK3588=y
> +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_STACK_R_ADDR=0x600000
> +CONFIG_TARGET_NANOPCT6_RK3588=y
> +CONFIG_SPL_STACK=0x400000
> +CONFIG_DEBUG_UART_BASE=0xFEB50000
> +CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
> +CONFIG_SYS_LOAD_ADDR=0xc00800
> +CONFIG_PCI=y
> +CONFIG_DEBUG_UART=y
> +CONFIG_FIT=y
> +CONFIG_FIT_VERBOSE=y
> +CONFIG_SPL_FIT_SIGNATURE=y
> +CONFIG_SPL_LOAD_FIT=y
> +CONFIG_LEGACY_IMAGE_FORMAT=y
> +CONFIG_OF_BOARD_SETUP=y
> +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_BOARDINFO_LATE=y
> +CONFIG_SPL_MAX_SIZE=0x40000
> +CONFIG_SPL_PAD_TO=0x7f8000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x4000000
> +CONFIG_SPL_BSS_MAX_SIZE=0x4000
> +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> +CONFIG_SPL_ATF=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_GPT=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_PCI=y
> +CONFIG_CMD_USB=y
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_REGULATOR=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_LIVE=y
> +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
> +CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SPL_REGMAP=y
> +CONFIG_SPL_SYSCON=y
> +CONFIG_SPL_CLK=y
> +CONFIG_ROCKCHIP_GPIO=y
> +CONFIG_SYS_I2C_ROCKCHIP=y
> +CONFIG_MISC=y
> +CONFIG_SUPPORT_EMMC_RPMB=y
> +CONFIG_MMC_DW=y
> +CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_SDMA=y
> +CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_SF_DEFAULT_BUS=5
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_XTX=y
> +CONFIG_PHYLIB=y
> +CONFIG_RTL8169=y
> +CONFIG_NVME_PCI=y
> +CONFIG_PCIE_DW_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> +CONFIG_PHY_ROCKCHIP_USBDP=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_PWM_ROCKCHIP=y
> +CONFIG_SPL_RAM=y
> +CONFIG_BAUDRATE=1500000
> +CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SFC=y
> +CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_DM_USB_GADGET=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_GENERIC=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_USB_HOST_ETHER=y
> +CONFIG_USB_ETHER_ASIX=y
> +CONFIG_USB_ETHER_ASIX88179=y
> +CONFIG_USB_ETHER_MCS7830=y
> +CONFIG_USB_ETHER_RTL8152=y
> +CONFIG_USB_ETHER_SMSC95XX=y
> +CONFIG_ERRNO_STR=y
> diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
> index 8262fc0d32..f8f0e66a9c 100644
> --- a/doc/board/rockchip/rockchip.rst
> +++ b/doc/board/rockchip/rockchip.rst
> @@ -115,6 +115,7 @@ List of mainline supported Rockchip boards:
> - Rockchip EVB (evb-rk3588)
> - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588)
> - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
> + - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588)
> - Radxa ROCK 5A (rock5a-rk3588s)
> - Radxa ROCK 5B (rock5b-rk3588)
>
> diff --git a/include/configs/nanopc-t6-rk3588.h b/include/configs/nanopc-t6-rk3588.h
> new file mode 100644
> index 0000000000..1ece6f9383
> --- /dev/null
> +++ b/include/configs/nanopc-t6-rk3588.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
> + */
> +
> +#ifndef __NANOPCT6_RK3588_H
> +#define __NANOPCT6_RK3588_H
> +
> +#define ROCKCHIP_DEVICE_SETTINGS \
> + "stdout=serial,vidconsole\0" \
> + "stderr=serial,vidconsole\0"
> +
> +#include <configs/rk3588_common.h>
> +
> +#endif /* __NANOPCT6_RK3588_H */
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