[PATCH v2 1/4] arm: dts: Refactor common dtsi file for R5 and A53 SPL
Nitin Yadav
n-yadav at ti.com
Mon Oct 30 12:01:35 CET 2023
Add k3-am62x-r5-sk-common to include nodes common for R5
SPL from k3-am625-r5-sk for AM62x SoC based boards. Add
k3-am62x-sk-common-u-boot to move common nodes of A53 SPL
stage from k3-am625-sk-u-boot.
Replace 'bootph-pre-ram' from 'bootph-all' as it's not available
at u-boot proper before relocation.
Signed-off-by: Nitin Yadav <n-yadav at ti.com>
---
arch/arm/dts/k3-am625-r5-sk.dts | 94 +----------------
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 110 +-------------------
arch/arm/dts/k3-am62x-r5-sk-common.dtsi | 96 +++++++++++++++++
arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi | 109 +++++++++++++++++++
4 files changed, 211 insertions(+), 198 deletions(-)
create mode 100644 arch/arm/dts/k3-am62x-r5-sk-common.dtsi
create mode 100644 arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index bf219226b9..faa7f693a2 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -1,102 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
* AM625 SK dts file for R5 SPL
- * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
#include "k3-am625-sk.dts"
#include "k3-am62x-sk-ddr4-1600MTs.dtsi"
#include "k3-am62-ddr.dtsi"
+#include "k3-am62x-r5-sk-common.dtsi"
#include "k3-am625-sk-u-boot.dtsi"
-
-/ {
- aliases {
- remoteproc0 = &sysctrler;
- remoteproc1 = &a53_0;
- serial0 = &wkup_uart0;
- serial3 = &main_uart1;
- };
-
- a53_0: a53 at 0 {
- compatible = "ti,am654-rproc";
- reg = <0x00 0x00a90000 0x00 0x10>;
- power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
- <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
- <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
- resets = <&k3_reset 135 0>;
- clocks = <&k3_clks 61 0>;
- assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
- assigned-clock-parents = <&k3_clks 61 2>;
- assigned-clock-rates = <200000000>, <1200000000>;
- ti,sci = <&dmsc>;
- ti,sci-proc-id = <32>;
- ti,sci-host-id = <10>;
- bootph-pre-ram;
- };
-
- dm_tifs: dm-tifs {
- compatible = "ti,j721e-dm-sci";
- ti,host-id = <36>;
- ti,secure-host;
- mbox-names = "rx", "tx";
- mboxes= <&secure_proxy_main 22>,
- <&secure_proxy_main 23>;
- bootph-pre-ram;
- };
-};
-
-&dmsc {
- mboxes= <&secure_proxy_main 0>,
- <&secure_proxy_main 1>,
- <&secure_proxy_main 0>;
- mbox-names = "rx", "tx", "notify";
- ti,host-id = <35>;
- ti,secure-host;
-};
-
-&mcu_esm {
- bootph-pre-ram;
-};
-
-&secure_proxy_sa3 {
- bootph-pre-ram;
- /* We require this for boot handshake */
- status = "okay";
-};
-
-&main_esm {
- bootph-pre-ram;
-};
-
-&cbass_main {
- sysctrler: sysctrler {
- compatible = "ti,am654-system-controller";
- mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
- mbox-names = "tx", "rx", "boot_notify";
- bootph-pre-ram;
- };
-};
-
-&wkup_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&main_uart1_pins_default {
- bootph-pre-ram;
-};
-
-/* WKUP UART0 is used for DM firmware logs */
-&wkup_uart0 {
- bootph-pre-ram;
-};
-
-/* Main UART1 is used for TIFS firmware logs */
-&main_uart1 {
- bootph-pre-ram;
-};
-
-&ospi0 {
- reg = <0x00 0x0fc40000 0x00 0x100>,
- <0x00 0x60000000 0x00 0x08000000>;
-};
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index c1685bc9ca..1a5238fb11 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -1,102 +1,12 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Common AM625 SK dts file for SPLs
- * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
+ * AM625 SK dts file for SPLs
+ * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include "k3-am625-sk-binman.dtsi"
-
-/ {
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &main_timer0;
- };
-
- aliases {
- mmc1 = &sdhci1;
- };
-
- memory at 80000000 {
- bootph-pre-ram;
- };
-};
-
-&cbass_main {
- bootph-pre-ram;
-};
-
-&main_timer0 {
- clock-frequency = <25000000>;
- bootph-pre-ram;
-};
-
-&dmss {
- bootph-pre-ram;
-};
-
-&secure_proxy_main {
- bootph-pre-ram;
-};
-
-&dmsc {
- bootph-pre-ram;
-};
-
-&k3_pds {
- bootph-pre-ram;
-};
-
-&k3_clks {
- bootph-pre-ram;
-};
-
-&k3_reset {
- bootph-pre-ram;
-};
-
-&wkup_conf {
- bootph-pre-ram;
-};
-
-&chipid {
- bootph-pre-ram;
-};
-
-&main_pmx0 {
- bootph-pre-ram;
-};
+#include "k3-am62x-sk-common-u-boot.dtsi"
-&main_uart0 {
- bootph-pre-ram;
-};
-
-&main_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&cbass_mcu {
- bootph-pre-ram;
-};
-
-&cbass_wakeup {
- bootph-pre-ram;
-};
-
-&mcu_pmx0 {
- bootph-pre-ram;
-};
-
-&sdhci1 {
- bootph-pre-ram;
-};
-
-&main_mmc1_pins_default {
- bootph-pre-ram;
-};
-
-&fss {
- bootph-pre-ram;
-};
+#include "k3-am625-sk-binman.dtsi"
&ospi0_pins_default {
bootph-pre-ram;
@@ -117,15 +27,3 @@
};
};
};
-
-&cpsw3g {
- bootph-pre-ram;
-};
-
-&cpsw_port1 {
- bootph-pre-ram;
-};
-
-&cpsw_port2 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/k3-am62x-r5-sk-common.dtsi b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
new file mode 100644
index 0000000000..04f897fc43
--- /dev/null
+++ b/arch/arm/dts/k3-am62x-r5-sk-common.dtsi
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Common SK dts file for R5 SPL
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ aliases {
+ remoteproc0 = &sysctrler;
+ remoteproc1 = &a53_0;
+ serial0 = &wkup_uart0;
+ serial3 = &main_uart1;
+ };
+
+ a53_0: a53 at 0 {
+ compatible = "ti,am654-rproc";
+ reg = <0x00 0x00a90000 0x00 0x10>;
+ power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
+ <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
+ resets = <&k3_reset 135 0>;
+ clocks = <&k3_clks 61 0>;
+ assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
+ assigned-clock-parents = <&k3_clks 61 2>;
+ assigned-clock-rates = <200000000>, <1200000000>;
+ ti,sci = <&dmsc>;
+ ti,sci-proc-id = <32>;
+ ti,sci-host-id = <10>;
+ bootph-pre-ram;
+ };
+
+ dm_tifs: dm-tifs {
+ compatible = "ti,j721e-dm-sci";
+ ti,host-id = <36>;
+ ti,secure-host;
+ mbox-names = "rx", "tx";
+ mboxes= <&secure_proxy_main 22>,
+ <&secure_proxy_main 23>;
+ bootph-pre-ram;
+ };
+};
+
+&dmsc {
+ mboxes= <&secure_proxy_main 0>,
+ <&secure_proxy_main 1>,
+ <&secure_proxy_main 0>;
+ mbox-names = "rx", "tx", "notify";
+ ti,host-id = <35>;
+ ti,secure-host;
+};
+
+&mcu_esm {
+ bootph-pre-ram;
+};
+
+&secure_proxy_sa3 {
+ bootph-pre-ram;
+ /* We require this for boot handshake */
+ status = "okay";
+};
+
+&main_esm {
+ bootph-pre-ram;
+};
+
+&cbass_main {
+ sysctrler: sysctrler {
+ compatible = "ti,am654-system-controller";
+ mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&secure_proxy_sa3 0>;
+ mbox-names = "tx", "rx", "boot_notify";
+ bootph-pre-ram;
+ };
+};
+
+&wkup_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_uart1_pins_default {
+ bootph-pre-ram;
+};
+
+/* WKUP UART0 is used for DM firmware logs */
+&wkup_uart0 {
+ bootph-pre-ram;
+};
+
+/* Main UART1 is used for TIFS firmware logs */
+&main_uart1 {
+ bootph-pre-ram;
+};
+
+&ospi0 {
+ reg = <0x00 0x0fc40000 0x00 0x100>,
+ <0x00 0x60000000 0x00 0x08000000>;
+};
diff --git a/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi b/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi
new file mode 100644
index 0000000000..628ce6636f
--- /dev/null
+++ b/arch/arm/dts/k3-am62x-sk-common-u-boot.dtsi
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Common AM625 SK dts file for SPLs
+ * Copyright (C) 2021-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+ chosen {
+ stdout-path = "serial2:115200n8";
+ tick-timer = &main_timer0;
+ };
+
+ aliases {
+ mmc1 = &sdhci1;
+ };
+
+ memory at 80000000 {
+ bootph-all;
+ };
+};
+
+&cbass_main {
+ bootph-all;
+};
+
+&main_timer0 {
+ clock-frequency = <25000000>;
+ bootph-all;
+};
+
+&dmss {
+ bootph-all;
+};
+
+&secure_proxy_main {
+ bootph-all;
+};
+
+&dmsc {
+ bootph-all;
+};
+
+&k3_pds {
+ bootph-all;
+};
+
+&k3_clks {
+ bootph-all;
+};
+
+&k3_reset {
+ bootph-all;
+};
+
+&wkup_conf {
+ bootph-all;
+};
+
+&chipid {
+ bootph-all;
+};
+
+&main_pmx0 {
+ bootph-all;
+};
+
+&main_uart0 {
+ bootph-all;
+};
+
+&main_uart0_pins_default {
+ bootph-all;
+};
+
+&cbass_mcu {
+ bootph-all;
+};
+
+&cbass_wakeup {
+ bootph-all;
+};
+
+&mcu_pmx0 {
+ bootph-all;
+};
+
+&sdhci1 {
+ bootph-all;
+};
+
+&main_mmc1_pins_default {
+ bootph-all;
+};
+
+&fss {
+ bootph-all;
+};
+
+&cpsw3g {
+ bootph-all;
+};
+
+&cpsw_port1 {
+ bootph-all;
+};
+
+&cpsw_port2 {
+ status = "disabled";
+};
--
2.25.1
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