[PATCH v3 2/6] apq8016: Add support for UART1 clocks and pinmux

[Caleb Connolly]

On 05/04/2024 11:07, Sumit Garg wrote:
> SE HMIBSC board uses UART1 as the main debug console, so add
> corresponding clocks and pinmux support. Along with that update
> instructions to enable clocks for debug UART support.
> 
> Signed-off-by: Sumit Garg <sumit.garg at linaro.org>

Reviewed-by: Caleb Connolly <caleb.connolly at linaro.org>
> ---
>   drivers/clk/qcom/clock-apq8016.c       | 38 ++++++++++++++++++--------
>   drivers/pinctrl/qcom/pinctrl-apq8016.c |  1 +
>   drivers/serial/serial_msm.c            | 11 ++++++--
>   3 files changed, 35 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
> index 5a5868169c8..9556b94774a 100644
> --- a/drivers/clk/qcom/clock-apq8016.c
> +++ b/drivers/clk/qcom/clock-apq8016.c
> @@ -31,7 +31,8 @@
>   #define BLSP1_AHB_CBCR			0x1008
>   
>   /* Uart clock control registers */
> -#define BLSP1_UART2_BCR			(0x3028)
> +#define BLSP1_UART1_APPS_CBCR		(0x203C)
> +#define BLSP1_UART1_APPS_CMD_RCGR	(0x2044)
>   #define BLSP1_UART2_APPS_CBCR		(0x302C)
>   #define BLSP1_UART2_APPS_CMD_RCGR	(0x3034)
>   
> @@ -52,7 +53,7 @@ static struct vote_clk gcc_blsp1_ahb_clk = {
>   };
>   
>   /* SDHCI */
> -static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
> +static int apq8016_clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
>   {
>   	int div = 15; /* 100MHz default */
>   
> @@ -70,20 +71,35 @@ static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
>   }
>   
>   /* UART: 115200 */
> -int apq8016_clk_init_uart(phys_addr_t base)
> +int apq8016_clk_init_uart(phys_addr_t base, unsigned long id)
>   {
> +	u32 cmd_rcgr, apps_cbcr;
> +
> +	switch (id) {
> +	case GCC_BLSP1_UART1_APPS_CLK:
> +		cmd_rcgr = BLSP1_UART1_APPS_CMD_RCGR;
> +		apps_cbcr = BLSP1_UART1_APPS_CBCR;
> +		break;
> +	case GCC_BLSP1_UART2_APPS_CLK:
> +		cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR;
> +		apps_cbcr = BLSP1_UART2_APPS_CBCR;
> +		break;
> +	default:
> +		return 0;
> +	}
> +
>   	/* Enable AHB clock */
>   	clk_enable_vote_clk(base, &gcc_blsp1_ahb_clk);
>   
>   	/* 7372800 uart block clock @ GPLL0 */
> -	clk_rcg_set_rate_mnd(base, BLSP1_UART2_APPS_CMD_RCGR, 1, 144, 15625,
> -			     CFG_CLK_SRC_GPLL0, 16);
> +	clk_rcg_set_rate_mnd(base, cmd_rcgr, 1, 144, 15625, CFG_CLK_SRC_GPLL0,
> +			     16);
>   
>   	/* Vote for gpll0 clock */
>   	clk_enable_gpll0(base, &gpll0_vote_clk);
>   
>   	/* Enable core clk */
> -	clk_enable_cbc(base + BLSP1_UART2_APPS_CBCR);
> +	clk_enable_cbc(base + apps_cbcr);
>   
>   	return 0;
>   }
> @@ -94,14 +110,12 @@ static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate)
>   
>   	switch (clk->id) {
>   	case GCC_SDCC1_APPS_CLK: /* SDC1 */
> -		return clk_init_sdc(priv, 0, rate);
> -		break;
> +		return apq8016_clk_init_sdc(priv, 0, rate);
>   	case GCC_SDCC2_APPS_CLK: /* SDC2 */
> -		return clk_init_sdc(priv, 1, rate);
> -		break;
> +		return apq8016_clk_init_sdc(priv, 1, rate);
> +	case GCC_BLSP1_UART1_APPS_CLK: /* UART1 */
>   	case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */
> -		return apq8016_clk_init_uart(priv->base);
> -		break;
> +		return apq8016_clk_init_uart(priv->base, clk->id);
>   	default:
>   		return 0;
>   	}
> diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c
> index a9a00f4b081..1ee8b7db1a2 100644
> --- a/drivers/pinctrl/qcom/pinctrl-apq8016.c
> +++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c
> @@ -29,6 +29,7 @@ static const char * const msm_pinctrl_pins[] = {
>   };
>   
>   static const struct pinctrl_function msm_pinctrl_functions[] = {
> +	{"blsp_uart1", 2},
>   	{"blsp_uart2", 2},
>   };
>   
> diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
> index ac4280c6c4c..4de10e75191 100644
> --- a/drivers/serial/serial_msm.c
> +++ b/drivers/serial/serial_msm.c
> @@ -248,12 +248,17 @@ static struct msm_serial_data init_serial_data = {
>   #include <debug_uart.h>
>   
>   /* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
> -//int apq8016_clk_init_uart(phys_addr_t gcc_base);
> +//int apq8016_clk_init_uart(phys_addr_t gcc_base, unsigned long id);
>   
>   static inline void _debug_uart_init(void)
>   {
> -	/* Uncomment to turn on UART clocks when debugging U-Boot as aboot on MSM8916 */
> -	//apq8016_clk_init_uart(0x1800000);
> +	/*
> +	 * Uncomment to turn on UART clocks when debugging U-Boot as aboot
> +	 * on MSM8916. Supported debug UART clock IDs:
> +	 *   - db410c: GCC_BLSP1_UART2_APPS_CLK
> +	 *   - HMIBSC: GCC_BLSP1_UART1_APPS_CLK
> +	 */
> +	//apq8016_clk_init_uart(0x1800000, <uart_clk_id>);
>   	uart_dm_init(&init_serial_data);
>   }
>   

-- 
// Caleb (they/them)