[PATCH v2 10/23] rockchip: rk35xx: Sort soc u-boot.dtsi alphabetically

[Jonas Karlman]

Sort nodes and props in RK356x/RK3588 u-boot.dtsi alphabetically, nodes
is sorted by reg addr then by alphabetical order.

This has no intended change beside sorting existing nodes and removing
a duplicated usbdpphy0_grf node.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
v2: Follow kernel sort order (Quentin)

[1] https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node
---
 arch/arm/dts/rk356x-u-boot.dtsi  | 98 ++++++++++++++++----------------
 arch/arm/dts/rk3588s-u-boot.dtsi | 69 +++++++++++-----------
 2 files changed, 81 insertions(+), 86 deletions(-)

diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 05367216e118..1ecf719202e9 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -38,46 +38,10 @@
 	};
 };
 
-&xin24m {
-	bootph-all;
-};
-
 &cru {
 	bootph-all;
 };
 
-&pmucru {
-	bootph-all;
-};
-
-&grf {
-	bootph-all;
-};
-
-&pmugrf {
-	bootph-all;
-};
-
-&pinctrl {
-	bootph-all;
-};
-
-&pcfg_pull_none_smt {
-	bootph-all;
-};
-
-&pcfg_pull_none {
-	bootph-all;
-};
-
-&pcfg_pull_up_drv_level_2 {
-	bootph-all;
-};
-
-&pcfg_pull_up {
-	bootph-all;
-};
-
 &emmc_bus8 {
 	bootph-all;
 };
@@ -102,10 +66,51 @@
 	bootph-all;
 };
 
+&grf {
+	bootph-all;
+};
+
 &i2c0_xfer {
 	bootph-all;
 };
 
+&pcfg_pull_none {
+	bootph-all;
+};
+
+&pcfg_pull_none_smt {
+	bootph-all;
+};
+
+&pcfg_pull_up {
+	bootph-all;
+};
+
+&pcfg_pull_up_drv_level_2 {
+	bootph-all;
+};
+
+&pinctrl {
+	bootph-all;
+};
+
+&pmucru {
+	bootph-all;
+};
+
+&pmugrf {
+	bootph-all;
+};
+
+&sdhci {
+	bootph-pre-ram;
+	max-frequency = <200000000>;
+};
+
+&sdmmc0 {
+	bootph-pre-ram;
+};
+
 &sdmmc0_bus4 {
 	bootph-all;
 };
@@ -126,24 +131,19 @@
 	bootph-all;
 };
 
-&uart2m0_xfer {
-	bootph-all;
-};
-
-&sdhci {
-	bootph-pre-ram;
-	max-frequency = <200000000>;
-};
-
-&sdmmc0 {
-	bootph-pre-ram;
-};
-
 &uart2 {
 	bootph-pre-ram;
 	clock-frequency = <24000000>;
 };
 
+&uart2m0_xfer {
+	bootph-all;
+};
+
+&xin24m {
+	bootph-all;
+};
+
 #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
 &binman {
 	simple-bin-spi {
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 233eb79d9ba2..543327954b1a 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -41,6 +41,17 @@
 		status = "disabled";
 	};
 
+	vo0_grf: syscon at fd5a6000 {
+		compatible = "rockchip,rk3588-vo-grf", "syscon";
+		reg = <0x0 0xfd5a6000 0x0 0x2000>;
+		clocks = <&cru PCLK_VO0GRF>;
+	};
+
+	usb_grf: syscon at fd5ac000 {
+		compatible = "rockchip,rk3588-usb-grf", "syscon";
+		reg = <0x0 0xfd5ac000 0x0 0x4000>;
+	};
+
 	usbdpphy0_grf: syscon at fd5c8000 {
 		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
 		reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -72,22 +83,6 @@
 		};
 	};
 
-	vo0_grf: syscon at fd5a6000 {
-		compatible = "rockchip,rk3588-vo-grf", "syscon";
-		reg = <0x0 0xfd5a6000 0x0 0x2000>;
-		clocks = <&cru PCLK_VO0GRF>;
-	};
-
-	usb_grf: syscon at fd5ac000 {
-		compatible = "rockchip,rk3588-usb-grf", "syscon";
-		reg = <0x0 0xfd5ac000 0x0 0x4000>;
-	};
-
-	usbdpphy0_grf: syscon at fd5c8000 {
-		compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
-		reg = <0x0 0xfd5c8000 0x0 0x4000>;
-	};
-
 	rng: rng at fe378000 {
 		compatible = "rockchip,trngv1";
 		reg = <0x0 0xfe378000 0x0 0x200>;
@@ -125,6 +120,10 @@
 	};
 };
 
+&cru {
+	bootph-pre-ram;
+};
+
 &emmc_bus8 {
 	bootph-all;
 };
@@ -145,32 +144,24 @@
 	bootph-all;
 };
 
-&pinctrl {
-	bootph-all;
+&ioc {
+	bootph-pre-ram;
 };
 
 &pcfg_pull_none {
 	bootph-all;
 };
 
-&pcfg_pull_up_drv_level_2 {
-	bootph-all;
-};
-
 &pcfg_pull_up {
 	bootph-all;
 };
 
-&xin24m {
+&pcfg_pull_up_drv_level_2 {
 	bootph-all;
 };
 
-&cru {
-	bootph-pre-ram;
-};
-
-&sys_grf {
-	bootph-pre-ram;
+&pinctrl {
+	bootph-all;
 };
 
 &pmu1grf {
@@ -185,18 +176,18 @@
 	bootph-pre-ram;
 };
 
-&sdmmc {
-	bootph-pre-ram;
-	bootph-some-ram;
-	u-boot,spl-fifo-mode;
-};
-
 &sdhci {
 	bootph-pre-ram;
 	bootph-some-ram;
 	u-boot,spl-fifo-mode;
 };
 
+&sdmmc {
+	bootph-pre-ram;
+	bootph-some-ram;
+	u-boot,spl-fifo-mode;
+};
+
 &sdmmc_bus4 {
 	bootph-all;
 };
@@ -213,6 +204,10 @@
 	bootph-all;
 };
 
+&sys_grf {
+	bootph-pre-ram;
+};
+
 &uart2 {
 	bootph-pre-ram;
 	clock-frequency = <24000000>;
@@ -222,8 +217,8 @@
 	bootph-all;
 };
 
-&ioc {
-	bootph-pre-ram;
+&xin24m {
+	bootph-all;
 };
 
 #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
-- 
2.43.2