[PATCH v2 0/5] Fix MMC tuning algorithm

[Judith Mendez]

The following patch series includes a MMC tuning algorithm
fix according to the following published paper [0].

This seris also includes fixes for OTAP/ITAP delay values
in j721e_4bit_sdhci_set_ios_post and for HS400 mode.

For DDR52 mode, also set ENDLL=1 and call am654_sdhci_setup_dll()
instead of am654_sdhci_setup_delay_chain() according to
device datasheet[1].

[0] https://www.ti.com/lit/an/spract9/spract9.pdf
[1] https://www.ti.com/lit/ds/symlink/am62p.pdf

Link to v1:
https://lore.kernel.org/u-boot/20240415212747.2678974-1-jm@ti.com/

Changes since v1:
- Use ENABLE macro instead of 0x1
- Fix assignment to val variable in j721e_4bit_sdhci_set_ios_post()
- Remove extra param from mmc_send_tunning() call
- Add Reviewed by

Judith Mendez (4):
  mmc: am654_sdhci: Add tuning algorithm for delay chain
  mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit
  mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode
  mmc: am654_sdhci: Fix ITAPDLY for HS400 timing

Nitin Yadav (1):
  mmc: am654_sdhci: Fix OTAP/ITAP delay values

 drivers/mmc/am654_sdhci.c | 172 +++++++++++++++++++++++++++++++-------
 1 file changed, 140 insertions(+), 32 deletions(-)


base-commit: 3434b88d2c2fdad3cc947f9e9b03dabfdd3feb5c
-- 
2.43.2