[PATCH] ARM: stm32: Report OTP-CLOSED instead of rev.? on closed STM32MP15xx

[Patrice CHOTARD]

On 4/14/24 20:39, Marek Vasut wrote:
> SoC revision is only accessible via DBUMCU IDC register,
> which requires BSEC.DENABLE DBGSWENABLE bit to be set to
> make the register accessible, otherwise an access to the
> register triggers bus fault. As BSEC.DBGSWENABLE is zero
> in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
> bit as this might open a brief window for timing attacks.
> Instead, report that this system is OTP-CLOSED and do not
> report any SoC revision to avoid confusing users. Use an
> SEC/C abbreviation to avoid growing SOC_NAME_SIZE .
> 
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Igor Opaniuk <igor.opaniuk at foundries.io>
> Cc: Patrice Chotard <patrice.chotard at foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay at foss.st.com>
> Cc: Simon Glass <sjg at chromium.org
> Cc: Simon Glass <sjg at chromium.org>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: u-boot at dh-electronics.com
> Cc: uboot-stm32 at st-md-mailman.stormreply.com
> ---
>  arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c | 19 +++++++++++++++++--
>  1 file changed, 17 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
> index afc56b02eea..dd99150fbc2 100644
> --- a/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
> +++ b/arch/arm/mach-stm32mp/stm32mp1/stm32mp15x.c
> @@ -322,8 +322,23 @@ void get_soc_name(char name[SOC_NAME_SIZE])
>  
>  	get_cpu_string_offsets(&type, &pkg, &rev);
>  
> -	snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s",
> -		 soc_type[type], soc_pkg[pkg], soc_rev[rev]);
> +	if (bsec_dbgswenable()) {
> +		snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s Rev.%s",
> +			 soc_type[type], soc_pkg[pkg], soc_rev[rev]);
> +	} else {
> +		/*
> +		 * SoC revision is only accessible via DBUMCU IDC register,
> +		 * which requires BSEC.DENABLE DBGSWENABLE bit to be set to
> +		 * make the register accessible, otherwise an access to the
> +		 * register triggers bus fault. As BSEC.DBGSWENABLE is zero
> +		 * in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
> +		 * bit as this might open a brief window for timing attacks.
> +		 * Instead, report that this system is OTP-CLOSED and do not
> +		 * report any SoC revision to avoid confusing users.
> +		 */
> +		snprintf(name, SOC_NAME_SIZE, "STM32MP%s%s SEC/C",
> +			 soc_type[type], soc_pkg[pkg]);
> +	}
>  }
>  
>  static void setup_soc_type_pkg_rev(void)

Applied on u-boot-stm32/master