[PATCH v6 04/18] video: tegra20: dc: pass DC id to internal devices

Thierry Reding thierry.reding at gmail.com
Fri Apr 19 18:38:34 CEST 2024


On Tue Jan 23, 2024 at 6:16 PM CET, Svyatoslav Ryhel wrote:
> Tegra SoC has 2 independent display controllers called DC_A and
> DC_B, they are handled differently by internal video devices like
> DSI and HDMI controllers so it is important for last to know
> which display controller is used to properly set up registers.
> To achieve this, a pipe field was added to pdata to pass display
> controller id to internal Tegra SoC devices.
>
> Tested-by: Agneli <poczt at protonmail.ch> # Toshiba AC100 T20
> Tested-by: Robert Eckelmann <longnoserob at gmail.com> # ASUS TF101
> Tested-by: Andreas Westman Dorcsak <hedmoo at yahoo.com> # ASUS Grouper E1565
> Tested-by: Ion Agorria <ion at agorria.com> # HTC One X
> Tested-by: Svyatoslav Ryhel <clamor95 at gmail.com> # Nvidia Tegratab T114
> Signed-off-by: Svyatoslav Ryhel <clamor95 at gmail.com>
> ---
>  drivers/video/tegra20/tegra-dc.c | 6 ++++++
>  drivers/video/tegra20/tegra-dc.h | 3 +++
>  2 files changed, 9 insertions(+)
>
> diff --git a/drivers/video/tegra20/tegra-dc.c b/drivers/video/tegra20/tegra-dc.c
> index 5d8874f323..0e94e665ef 100644
> --- a/drivers/video/tegra20/tegra-dc.c
> +++ b/drivers/video/tegra20/tegra-dc.c
> @@ -45,6 +45,7 @@ struct tegra_lcd_priv {
>  	unsigned pixel_clock;		/* Pixel clock in Hz */
>  	int dc_clk[2];			/* Contains clk and its parent */
>  	bool rotation;			/* 180 degree panel turn */
> +	bool pipe;			/* DC controller: 0 for A, 1 for B */

Bool is a poor choice, even if there's only two of them. This is a
proper index, so it should be some sort of integer.

Also, the device tree bindings for the display controller specify a
"nvidia,head" property that can be used to identify these. If you add
that to the U-Boot DT you can avoid looking up by name to map this
value.

Thierry
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