[PATCH v6 05/18] video: tegra20: dc: add PLLD2 parent support

[Thierry Reding]

On Tue Jan 23, 2024 at 6:16 PM CET, Svyatoslav Ryhel wrote:
> T30+ SOC have second PLLD - PLLD2 which can be actively used by
> DC and act as main DISP1/2 clock parent.
>
> Tested-by: Agneli <poczt at protonmail.ch> # Toshiba AC100 T20
> Tested-by: Robert Eckelmann <longnoserob at gmail.com> # ASUS TF101
> Tested-by: Andreas Westman Dorcsak <hedmoo at yahoo.com> # ASUS Grouper E1565
> Tested-by: Ion Agorria <ion at agorria.com> # HTC One X
> Tested-by: Svyatoslav Ryhel <clamor95 at gmail.com> # Nvidia Tegratab T114
> Signed-off-by: Svyatoslav Ryhel <clamor95 at gmail.com>
> ---
>  drivers/video/tegra20/tegra-dc.c | 6 ++++++
>  1 file changed, 6 insertions(+)

Reviewed-by: Thierry Reding <treding at nvidia.com>
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