[PATCH 1/2] rockchip: rk3588: add support for UART2 M1 and M2 in SPL

Quentin Schulz quentin.schulz at theobroma-systems.com
Tue Apr 23 11:31:51 CEST 2024


Hi Kever,

On 4/23/24 03:09, Kever Yang wrote:
> Hi Quentin,
> 
> On 2024/4/23 00:41, Quentin Schulz wrote:
>> From: Quentin Schulz <quentin.schulz at theobroma-systems.com>
>>
>> UART2 controller is the controller in the reference design for debug
>> console. The default mux is M0 in that reference design. Until now, all
>> boards seemed to be using UART2M0 but RK3588 Tiger for example will be
>> using UART2M2 instead.
> This feature already been supported, please use CONFIG_DEBUG_UART_BASE and
> CONFIG_ROCKCHIP_UART_MUX_SEL_M to select your output channel.
> 

CONFIG_ROCKCHIP_UART_MUX_SEL_M is only available in Rockchip's 
downstream U-Boot.

git log -p -S ROCKCHIP_UART_MUX_SEL_M

returns nothing upstream, neither does git grep.

I used the same mechanism as for PX30.

This patch will be removed though as it's not needed until we have an 
open-source DRAM init. Until then we have to rely on the DDR bin to 
setup the UART.

Cheers,
Quentin


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