[PATCH v3 01/11] rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588

[Jonas Karlman]

Hi Quentin,

On 2024-04-24 11:11, Quentin Schulz wrote:
> Hi Jonas,
> 
> On 4/24/24 00:40, Jonas Karlman wrote:
>> Hi Quentin,
>>
>> On 2024-04-15 16:16, Quentin Schulz wrote:
>>> From: Quentin Schulz <quentin.schulz at theobroma-systems.com>
> [...]
> 
>>> +			if (!(tmp_mem_map->attrs & PTE_BLOCK_NON_SHARE)) {
>>
>> This check does not seem to work because PTE_BLOCK_NON_SHARE evaluates
>> to 0. Because of this the logic to split the 0-8 GiB bank reported on
>> rk3568 is never split in two.
>>
> 
> Oof, that's a bit oversight, thanks for the catch.
> 
> Can you test the following please?
> 
> """
> diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
> index 5b1ff1e5495..0492f9b9f41 100644
> --- a/arch/arm/mach-rockchip/sdram.c
> +++ b/arch/arm/mach-rockchip/sdram.c
> @@ -196,7 +196,23 @@ static int rockchip_dram_init_banksize(void)
>   			const phys_size_t rsrv_size = tmp_mem_map->size;
>   			const phys_addr_t rsrv_end = rsrv_start + rsrv_size;
> 
> -			if (!(tmp_mem_map->attrs & PTE_BLOCK_NON_SHARE)) {
> +			/*
> +			 * DRAM memories are expected by Arm to be marked as
> +			 * Normal Write-back cacheable, Inner shareable[1], so
> +			 * let's filter on that to put holes in non-DRAM areas.
> +			 *
> +			 * [1] 
> https://developer.arm.com/documentation/102376/0200/Cacheability-and-shareability-attributes
> +			 */
> +			const u64 dram_attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> +				PTE_BLOCK_INNER_SHARE;
> +			/*
> +			 * (AttrIndx | SH) in Lower Attributes of Block
> +			 * Descriptor[2].
> +			 * [2] 
> https://developer.arm.com/documentation/102376/0200/Describing-memory-in-AArch64
> +			 */
> +			const u64 attrs_mask = PMD_ATTRINDX_MASK | GENMASK(9, 8);
> +
> +			if ((tmp_mem_map->attrs & attrs_mask) == dram_attrs) {
>   				tmp_mem_map++;
>   				continue;
>   			}
> """
> 
> The DRAM mem_map entry for Rockchip devices seems to have those 
> attributes and no other non-DRAM entry seems to have 
> PTE_BLOCK_MEMTYPE(MT_NORMAL).
> 
> We may have an issue in the future if we also want to mark SRAM, ROM or 
> flash 
> (https://developer.arm.com/documentation/102376/0200/Normal-memory 
> because it's likely those would also match the same attributes but we 
> would need to put holes for those so that they aren't thought to be 
> DRAM, but I guess we can tackle this the day this happens :)
> 
> Thanks again for the catch, let me know if this helps and makes sense 
> and I'll send a v4 for it.

I think this makes sense and seem to work on at least two of my RK356x
8GB boards using the generic-rk3568 target.

U-Boot:

  => bdinfo
  boot_params = 0x0000000000000000
  DRAM bank   = 0x0000000000000000
  -> start    = 0x0000000000200000
  -> size     = 0x00000000efe00000
  DRAM bank   = 0x0000000000000001
  -> start    = 0x0000000100000000
  -> size     = 0x0000000100000000
  flashstart  = 0x0000000000000000
  flashsize   = 0x0000000000000000
  flashoffset = 0x0000000000000000
  baudrate    = 1500000 bps
  relocaddr   = 0x00000000eff3a000
  reloc off   = 0x00000000ef53a000
  Build       = 64-bit
  fdt_blob    = 0x00000000edf0b390
  new_fdt     = 0x00000000edf0b390
  fdt_size    = 0x000000000000f980
  lmb_dump_all:
   memory.cnt = 0x2 / max = 0x10
   memory[0]      [0x200000-0xefffffff], 0xefe00000 bytes flags: 0
   memory[1]      [0x100000000-0x1ffffffff], 0x100000000 bytes flags: 0
   reserved.cnt = 0x2 / max = 0x10
   reserved[0]    [0xecf07000-0xefffffff], 0x030f9000 bytes flags: 0
   reserved[1]    [0x100000000-0x1ffffffff], 0x100000000 bytes flags: 0
  devicetree  = separate
  serial addr = 0x00000000fe660000
   width      = 0x0000000000000004
   shift      = 0x0000000000000002
   offset     = 0x0000000000000000
   clock      = 0x00000000016e3600
  arch_number = 0x0000000000000000
  TLB addr    = 0x00000000efff0000
  irq_sp      = 0x00000000edf0b0c0
  sp start    = 0x00000000edf0b0c0
  Early malloc usage: 2338 / 10000

Linux:

  [    0.000000] Machine model: Generic RK3566/RK3568
  [    0.000000] efi: UEFI not found.
  [    0.000000] NUMA: No NUMA configuration found
  [    0.000000] NUMA: Faking a node at [mem 0x0000000000200000-0x00000001ffffffff]
  [    0.000000] NUMA: NODE_DATA [mem 0x1ff0389c0-0x1ff03afff]
  [    0.000000] Zone ranges:
  [    0.000000]   DMA      [mem 0x0000000000200000-0x00000000ffffffff]
  [    0.000000]   DMA32    empty
  [    0.000000]   Normal   [mem 0x0000000100000000-0x00000001ffffffff]
  [    0.000000] Movable zone start for each node
  [    0.000000] Early memory node ranges
  [    0.000000]   node   0: [mem 0x0000000000200000-0x00000000efffffff]
  [    0.000000]   node   0: [mem 0x0000000100000000-0x00000001ffffffff]
  [    0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x00000001ffffffff]
  [    0.000000] On node 0, zone DMA: 512 pages in unavailable ranges
  [    0.000000] cma: Reserved 32 MiB at 0x00000000ee000000 on node -1

Regards,
Jonas

> 
> Cheers,
> Quentin