[PATCH v2 6/6] mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes

[Tudor Ambarus]

On 4/25/24 05:52, tkuw584924 at gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> 
> The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each
> ECC block being 16 bytes. Under this scheme multi-pass programming to an
> ECC block is not allowed. Set the writesize to make sure multi-pass
> programming is not attempted on the flash.
> 
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>

Acked-by: Tudor Ambarus <tudor.ambarus at linaro.org>
> ---
>  drivers/mtd/spi/spi-nor-core.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index ee968c10e4..7985ca70ff 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -3456,6 +3456,13 @@ static void s25_late_init(struct spi_nor *nor,
>  			  struct spi_nor_flash_parameter *params)
>  {
>  	nor->setup = s25_s28_setup;
> +
> +	/*
> +	 * Programming is supported only in 16-byte ECC data unit granularity.
> +	 * Byte-programming, bit-walking, or multiple program operations to the
> +	 * same ECC data unit without an erase are not allowed.
> +	 */
> +	params->writesize = 16;
>  }
>  
>  static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
> @@ -3620,6 +3627,13 @@ static void s28hx_t_late_init(struct spi_nor *nor,
>  {
>  	nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
>  	nor->setup = s25_s28_setup;
> +
> +	/*
> +	 * Programming is supported only in 16-byte ECC data unit granularity.
> +	 * Byte-programming, bit-walking, or multiple program operations to the
> +	 * same ECC data unit without an erase are not allowed.
> +	 */
> +	params->writesize = 16;
>  }
>  
>  static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,