[resend v2 05/19] drivers: mtd: nand: cadence: Add support for read status command
dinesh.maniyam at intel.com
dinesh.maniyam at intel.com
Thu Dec 5 10:23:01 CET 2024
From: Dinesh Maniyam <dinesh.maniyam at intel.com>
Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam at intel.com>
---
v2:
- remove the "this patch is to" commit phrases
---
---
drivers/mtd/nand/raw/cadence_nand.c | 48 ++++++++++++++++++++++++++++-
include/cadence-nand.h | 2 ++
2 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c
index 0a9e1b1822..261ca6b182 100644
--- a/drivers/mtd/nand/raw/cadence_nand.c
+++ b/drivers/mtd/nand/raw/cadence_nand.c
@@ -344,6 +344,7 @@ static int cadence_nand_generic_cmd_send(struct cadence_nand_info *cadence,
/* Issue command. */
writel_relaxed(reg, cadence->reg + CMD_REG0);
+ cadence->buf_index = 0;
return 0;
}
@@ -1932,9 +1933,43 @@ static void cadence_nand_select_chip(struct mtd_info *mtd, int chipnr)
}
}
+static int cadence_nand_status(struct mtd_info *mtd, unsigned int command)
+{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ int ret = 0;
+
+ ret = cadence_nand_cmd_opcode(chip, command);
+ if (ret)
+ return ret;
+
+ ret = cadence_nand_cmd_data(chip, 1, GCMD_DIR_READ);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
static void cadence_nand_cmdfunc(struct mtd_info *mtd, unsigned int command,
int offset_in_page, int page)
{
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller);
+ int ret = 0;
+
+ cadence->cmd = command;
+ switch (command) {
+ case NAND_CMD_STATUS:
+ ret = cadence_nand_status(mtd, command);
+ break;
+ /*
+ * ecc will override other command for read, write and erase
+ */
+ default:
+ break;
+ }
+
+ if (ret != 0)
+ printf("ERROR:%s:command:0x%x\n", __func__, cadence->cmd);
}
static int cadence_nand_dev_ready(struct mtd_info *mtd)
@@ -1952,7 +1987,18 @@ static int cadence_nand_dev_ready(struct mtd_info *mtd)
static u8 cadence_nand_read_byte(struct mtd_info *mtd)
{
- return 0;
+ struct nand_chip *chip = mtd_to_nand(mtd);
+ struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller);
+ u32 size = 1;
+ u8 val;
+
+ if (cadence->buf_index == 0)
+ cadence_nand_read_buf(mtd, &cadence->buf[0], size);
+
+ val = *(&cadence->buf[0] + cadence->buf_index);
+ cadence->buf_index++;
+
+ return val;
}
static void cadence_nand_write_byte(struct mtd_info *mtd, u8 byte)
diff --git a/include/cadence-nand.h b/include/cadence-nand.h
index 7973e5b55b..27ed217b1e 100644
--- a/include/cadence-nand.h
+++ b/include/cadence-nand.h
@@ -454,6 +454,8 @@ struct cadence_nand_info {
u8 *buf;
u32 buf_size;
u8 *stat;
+ u8 cmd;
+ u32 buf_index;
u8 curr_corr_str_idx;
--
2.19.0
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