[PATCH v2] mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled

Abbarapu, Venkatesh venkatesh.abbarapu at amd.com
Thu Dec 19 05:21:45 CET 2024



> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: Wednesday, December 18, 2024 7:28 PM
> To: Abbarapu, Venkatesh <venkatesh.abbarapu at amd.com>; u-boot at lists.denx.de;
> tudor.ambarus at linaro.org; j-humphreys at ti.com
> Cc: Simek, Michal <michal.simek at amd.com>; jagan at amarulasolutions.com;
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> p-mantena at ti.com; git (AMD-Xilinx) <git at amd.com>
> Subject: Re: [PATCH v2] mtd: spi-nor: Fix the spi_nor_read() when config
> SPI_STACKED_PARALLEL is enabled
> 
> On 12/18/24 10:22 AM, Abbarapu, Venkatesh wrote:
> 
> >>>>> For parallel/stacked configuration and address width the
> >>>>> "rem_bank_len" will vary
> >>>> and as we don't want to disturb the default read functionality
> >>>> added the ifdef separately.
> >>>> What would happen if both SPI_FLASH_BAR and
> SPI_STACKED_PARALLEL
> >> are
> >>>> enabled on a system that only has one SPI NOR attached
> >>>> (non-stacked/parallel) ? I noticed the second "copy" of the code
> >>>> behaves slightly differently in the else branch, so does that mean
> >>>> this would
> >> break such setup ?
> >>>
> >>> If both SPI_FLASH_BAR and SPI_STACKED_PARALLEL are enabled, the
> >> "rem_bank_len" manipulation is done under the
> >> CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL) code and this won't break
> any
> >> default functionality.
> >> Wouldn't read_len calculation be done twice ?
> > Yes.  As "rem_bank_len" will be changed based on parallel configuration, so
> added the additional code copy to not break the default code.
> Can you please also update it to avoid the code duplication ?
The code is entirely separated out based on CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL), not sure I can remove this additional code copy. Do you have any better way to avoid this code duplication?

Thanks
Venkatesh
> 
> Thank you


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