[PATCH 13/16] pinctrl: renesas: Minimize R8A779A0 V3U PFC tables
Marek Vasut
marek.vasut+renesas at mailbox.org
Sat Dec 21 22:34:12 CET 2024
Reduce the PFC tables by ifdeffing out pinmux settings which are
unlikely to be used by U-Boot. This helps reduce the size of the
bootloader in the 10 kiB range. This includes conditional build
of these PFC additions:
- CAN/CANFD
- DU
- INTC-EX
- MSIOF
- PWM
Signed-off-by: Marek Vasut <marek.vasut+renesas at mailbox.org>
---
Cc: Hai Pham <hai.pham.ud at renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
Cc: Paul Barker <paul.barker.ct at bp.renesas.com>
Cc: Tom Rini <trini at konsulko.com>
Cc: u-boot at lists.denx.de
---
drivers/pinctrl/renesas/pfc-r8a779a0.c | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 6f898385027..39690bd5d07 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -1697,6 +1697,7 @@ static const unsigned int avb5_avtp_match_mux[] = {
AVB5_AVTP_MATCH_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - CANFD0 ----------------------------------------------------------------- */
static const unsigned int canfd0_data_pins[] = {
/* CANFD0_TX, CANFD0_RX */
@@ -1817,6 +1818,7 @@ static const unsigned int du_oddf_pins[] = {
static const unsigned int du_oddf_mux[] = {
DU_ODDF_DISP_CDE_MARK,
};
+#endif
/* - HSCIF0 ----------------------------------------------------------------- */
static const unsigned int hscif0_data_pins[] = {
@@ -1973,6 +1975,7 @@ static const unsigned int i2c6_mux[] = {
SDA6_MARK, SCL6_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - INTC-EX ---------------------------------------------------------------- */
static const unsigned int intc_ex_irq0_pins[] = {
/* IRQ0 */
@@ -2016,6 +2019,7 @@ static const unsigned int intc_ex_irq5_pins[] = {
static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
+#endif
/* - MMC -------------------------------------------------------------------- */
static const unsigned int mmc_data_pins[] = {
@@ -2060,6 +2064,7 @@ static const unsigned int mmc_ds_mux[] = {
MMC_DS_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* MSIOF0_SCK */
@@ -2368,6 +2373,7 @@ static const unsigned int pwm4_pins[] = {
static const unsigned int pwm4_mux[] = {
PWM4_MARK,
};
+#endif
/* - QSPI0 ------------------------------------------------------------------ */
static const unsigned int qspi0_ctrl_pins[] = {
@@ -2651,6 +2657,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(avb5_avtp_capture),
SH_PFC_PIN_GROUP(avb5_avtp_match),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(canfd0_data),
SH_PFC_PIN_GROUP(canfd1_data),
SH_PFC_PIN_GROUP(canfd2_data),
@@ -2665,6 +2672,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_clk_out),
SH_PFC_PIN_GROUP(du_sync),
SH_PFC_PIN_GROUP(du_oddf),
+#endif
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
@@ -2687,12 +2695,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(i2c5),
SH_PFC_PIN_GROUP(i2c6),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(intc_ex_irq0),
SH_PFC_PIN_GROUP(intc_ex_irq1),
SH_PFC_PIN_GROUP(intc_ex_irq2),
SH_PFC_PIN_GROUP(intc_ex_irq3),
SH_PFC_PIN_GROUP(intc_ex_irq4),
SH_PFC_PIN_GROUP(intc_ex_irq5),
+#endif
BUS_DATA_PIN_GROUP(mmc_data, 1),
BUS_DATA_PIN_GROUP(mmc_data, 4),
@@ -2702,6 +2712,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(mmc_wp),
SH_PFC_PIN_GROUP(mmc_ds),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(msiof0_clk),
SH_PFC_PIN_GROUP(msiof0_sync),
SH_PFC_PIN_GROUP(msiof0_ss1),
@@ -2744,6 +2755,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(pwm2),
SH_PFC_PIN_GROUP(pwm3),
SH_PFC_PIN_GROUP(pwm4),
+#endif
SH_PFC_PIN_GROUP(qspi0_ctrl),
BUS_DATA_PIN_GROUP(qspi0_data, 2),
@@ -2852,6 +2864,7 @@ static const char * const avb5_groups[] = {
"avb5_avtp_match",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const canfd0_groups[] = {
"canfd0_data",
};
@@ -2894,6 +2907,7 @@ static const char * const du_groups[] = {
"du_sync",
"du_oddf",
};
+#endif
static const char * const hscif0_groups[] = {
"hscif0_data",
@@ -2947,6 +2961,7 @@ static const char * const i2c6_groups[] = {
"i2c6",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const intc_ex_groups[] = {
"intc_ex_irq0",
"intc_ex_irq1",
@@ -2955,6 +2970,7 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq4",
"intc_ex_irq5",
};
+#endif
static const char * const mmc_groups[] = {
"mmc_data1",
@@ -2966,6 +2982,7 @@ static const char * const mmc_groups[] = {
"mmc_ds",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@@ -3039,6 +3056,7 @@ static const char * const pwm3_groups[] = {
static const char * const pwm4_groups[] = {
"pwm4",
};
+#endif
static const char * const qspi0_groups[] = {
"qspi0_ctrl",
@@ -3105,6 +3123,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(avb4),
SH_PFC_FUNCTION(avb5),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(canfd2),
@@ -3116,6 +3135,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(can_clk),
SH_PFC_FUNCTION(du),
+#endif
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
@@ -3130,10 +3150,13 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(i2c5),
SH_PFC_FUNCTION(i2c6),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(intc_ex),
+#endif
SH_PFC_FUNCTION(mmc),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
@@ -3146,6 +3169,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(pwm2),
SH_PFC_FUNCTION(pwm3),
SH_PFC_FUNCTION(pwm4),
+#endif
SH_PFC_FUNCTION(qspi0),
SH_PFC_FUNCTION(qspi1),
--
2.45.2
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