Correct Default SPL_SIZE_LIMIT for Cyclone/Arria V (SOCFPGA_GEN5)

[Thomas Carpenter]

Hi

Not sure how you deal with contributions. There is a bug in the "arch/arm/mach-socfpga/Kconfig file.

The default SPL_SIZE_LIMIT parameter for TARGET_SOCFPGA_GEN5 should be 60kB (0xF000) not 64kB (0x10000).

Referring to the Cyclone V Hard Processor System Technical Reference Manual (same for Arria V), Section A-32, "Loading the Preloader Image". The upper 4kB of the on-chip RAM is reserved by the Boot ROM, meaning only 60kB is available for the preloader. If the SPL image size extends into this region, it causes the boot ROM to crash.


Patch for `arch/arm/mach-socfpga/Kconfig`:

@@ -23,7 +23,7 @@ config SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE
        depends on SOCFPGA_SECURE_VAB_AUTH

config SPL_SIZE_LIMIT
-       default 0xF000 if TARGET_SOCFPGA_GEN5
+       default 0x10000 if TARGET_SOCFPGA_GEN5

config SPL_SIZE_LIMIT_PROVIDE_STACK
        default 0x200 if TARGET_SOCFPGA_GEN5



The incorrect limit has clearly existed for a while (same issue is in the altera-opensource/u-boot-socfpga fork as well), it's probably just not caused an issue because the default SPL config is compact enough to not exceed the actual limit by pure luck rather than by validation. In our custom configuration we exceeded the 0xF000 limit (with no error from the build tools) - took a while to figure out why the processor would fail to boot as a result.


Kind Regards,

Dr Thomas Carpenter