[PATCH next v2 6/6] rockchip: ringneck-px30: fix TPL_MAX_SIZE

[Kever Yang]

On 2024/6/5 23:56, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at cherry.de>
>
> Ringneck was mistakenly set to allow up to 128KiB for the TPL code size
> while PX30 SoC only has 16KiB of SRAM.
>
> Therefore, let's use the default value of TPL_MAX_SIZE from the SoC
> (which is 10KiB) so that the max code size is actually checked and
> useful.
>
> Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou Devkit")
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   configs/ringneck-px30_defconfig | 1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
> index a22d25e0089..9965e55d611 100644
> --- a/configs/ringneck-px30_defconfig
> +++ b/configs/ringneck-px30_defconfig
> @@ -14,7 +14,6 @@ CONFIG_SPL_DRIVERS_MISC=y
>   CONFIG_DEBUG_UART_BASE=0xFF030000
>   CONFIG_DEBUG_UART_CLOCK=24000000
>   CONFIG_SYS_LOAD_ADDR=0x800800
> -CONFIG_TPL_MAX_SIZE=0x20000
>   CONFIG_DEBUG_UART=y
>   # CONFIG_ANDROID_BOOT_IMAGE is not set
>   CONFIG_FIT=y
>