[PATCH 7/9] rockchip: bob: kevin: Disable dcache in SPL

Simon Glass sjg at chromium.org
Mon Jun 10 17:17:54 CEST 2024


Hi Jonas,

On Thu, 6 Jun 2024 at 09:04, Simon Glass <sjg at chromium.org> wrote:
>
> Hi Jonas,
>
> On Wed, 5 Jun 2024 at 05:07, Jonas Karlman <jonas at kwiboo.se> wrote:
> >
> > Hi Simon,
> >
> > On 2024-06-05 05:25, Simon Glass wrote:
> > > This causes a hang, so disable it.
> >
> > When I initially tested this on multiple boards there was some boards
> > that also hanged, that turned out to be an issue in one of the drivers.
> >
> > If I remember correctly such hang was related to a null pointer
> > dereference or unaligned access in one of the drivers.
> >
> > Could there be a similar underlying issue for these boards?
>
> Yes it could be. I will take a look.
>
> But given the release date I would like to get this patch in first.

I did find a bug in memory sizing, but fixing that was not enough to
get the cache running. I am not sure how to debug it, since presumably
the code works fine on other rk3399 boards (sadly mine broke a few
days ago).

Regards,
Simon


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