[PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present

[Tom Rini]

On Mon, Jun 10, 2024 at 02:43:17PM -0500, Sam Protsenko wrote:
> On Tue, May 14, 2024 at 3:26 PM Sam Protsenko
> <semen.protsenko at linaro.org> wrote:
> >
> > On Wed, May 1, 2024 at 4:12 PM Sam Protsenko <semen.protsenko at linaro.org> wrote:
> > >
> > > On Wed, Apr 10, 2024 at 9:53 PM Sean Anderson <seanga2 at gmail.com> wrote:
> > > >
> > > > On 3/7/24 19:04, Sam Protsenko wrote:
> > > > > Sometimes clocks provided to a consumer might not have .set_rate
> > > > > operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag
> > > > > set. In that case it's usually possible to find a parent up the tree
> > > > > which is capable of setting the rate (div, pll, etc). Implement a simple
> > > > > lookup procedure for such cases, to traverse the clock tree until
> > > > > .set_rate capable parent is found, and use that parent to actually
> > > > > change the rate. The search will stop once the first .set_rate capable
> > > > > clock is found, which is usually enough to handle most cases.
> > > > >
> > > > > Signed-off-by: Sam Protsenko <semen.protsenko at linaro.org>
> > > > > ---
> > >
> > > [snip]
> > >
> > > >
> > > > Can you give an example of where this is needed?
> > > >
> > >
> > > Sure. In my case it's needed for eMMC enablement on E850-96 board.
> > > eMMC node in the device tree [1] is a gate clock
> > > (CLK_GOUT_MMC_EMBD_SDCLKIN), so the MMC driver won't be able to change
> > > its rate. But that clock actually has CLK_SET_RATE_PARENT flag set in
> > > the clock driver [2]. So the right thing to do in this case (and
> > > that's basically how it's done in Linux kernel too) is to traverse the
> > > clock tree upwards, and try to find the parent capable to do .set_rate
> > > (which is usually a divider clock), and use it to change the clock
> > > rate. I'm working on exynos_dw_mmc driver [3] right now, making it use
> > > CCF clocks, but I can't do that before this patch is applied.
> > >
> > > Grepping the U-Boot tree I can see the CLK_SET_RATE_PARENT flag is
> > > also used in various IMX clock drivers and STM32MP13 clock driver. I
> > > guess without this change those flags will be basically ignored.
> > >
> > > Thanks!
> > >
> >
> > Hi Sean,
> >
> > Just wanted to check if you think my explanation above is ok and the
> > patch can be applied? I'm finishing my new patch series for enabling
> > MMC on E850-96, but this patch has to be applied first.
> >
> > Thanks!
> >
> 
> Hi Tom,
> 
> Would it be reasonable to ask you to take care of this patch? It's
> been ignored for 3 months now, but it's needed for eMMC enablement on
> E850-96 board.

Any comments at this point Sean?

-- 
Tom
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