[PATCH] arm: dts: k3-j721s2-r5: Change GTC clock parent

[Tom Rini]

On Tue, 28 May 2024 15:19:54 +0530, Neha Malcom Francis wrote:

> MAIN_PLL0 has a flag set in DM (Device Manager) that removes its
> capability to re-initialise clock frequencies. A72 CPU clock (GTC) and
> RGMII has MAIN_PLL3 as their parent which does not have this flag. While
> RGMII needs re-initialization to default frequency to be able to get
> 250MHz with its divider, GTC can not get its required 200MHz with its
> dividers. Thus move GTC clock parent on J721S2 from MAIN_PLL3_HSDIV1 to
> MAIN_PLL0_HSDIV6. This was already done on CPTS node in kernel which was
> similarly affected (linked).
> 
> [...]

Applied to u-boot/master, thanks!

-- 
Tom