[PATCH] mtd: spi-nor: ids: Add IS25LP01GG flash support

[Michal Simek]

On 6/17/24 08:28, Dhruva Gole wrote:
> On Jun 17, 2024 at 09:48:42 +0530, Prasad Kummari wrote:
>> Add support for ISSI 128MB flash IS25LP01GG. This part
> 
> Can we have the datasheet link for this part?
> I am assuming it's this?
> https://www.issi.com/WW/pdf/25LP-WP01GG.pdf

Problem with links is that they will disappear when company decide to change 
infrastructure or is acquired by different one.

> 
> Better to add it to the commit message.

Not sure what's U-Boot policy on this but placing it below --- should be enough
or what you have done as reply to this email that it can be found via b4.

Thanks,
Michal

> 
>> supports 4byte opcodes. It also supports dual and quad
>> read.
>>
>> Signed-off-by: Prasad Kummari <prasad.kummari at amd.com>
>> ---
>>   drivers/mtd/spi/spi-nor-ids.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
>> index 4e83b8c94c..8cad764237 100644
>> --- a/drivers/mtd/spi/spi-nor-ids.c
>> +++ b/drivers/mtd/spi/spi-nor-ids.c
>> @@ -242,6 +242,8 @@ const struct flash_info spi_nor_ids[] = {
>>   			SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
>>   	{ INFO("is25lx512",  0x9d5a1a, 0, 64 * 1024, 1024,
>>   			SECT_4K | USE_FSR | SPI_NOR_4B_OPCODES | SPI_NOR_HAS_TB) },
>> +	{ INFO("is25lp01gg",  0x9d6021, 0, 64 * 1024, 2048,
>> +			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_TB) },
> 
> Otherwise looks good to me,
> Reviewed-by: Dhruva Gole <d-gole at ti.com>
> 
>