[PATCH 2/3] rockchip: fix wrong PCI range address in rk3568 dtsi

[Etienne Dublé]

Hello Jonas,

Le 25/06/2024 à 12:46, Jonas Karlman a écrit :
> Ahh, linux is still missing a patch to be able to use full address ranges
> as a root complex.
>
> Will re-run some tests on my R5C on both u-boot and linux to see if I can
> replicate your issue.

OK.
To use the second interface in u-boot, you first need to provide a 
".bind()" member function in the rtl8169 driver, otherwise both 
interfaces have the same name (this is my [PATCH 1/3]).
Then :

Hit any key to stop autoboot:  0
=> pci enum
=> net list
eth0 : RTL8169#0 52:e8:a1:60:81:e7 active
eth1 : RTL8169#1 52:e8:a1:60:81:e6
=> setenv ethact "RTL8169#1"
=> dhcp

The issue appears when sending the first packet. When activating 
DEBUG_RTL8169_TX in rtl8169.c it prints "tx timeout/error".

> The issue may be that U-Boot is not fully capable of having overlapping
> bus addresses for multiple pci controllers.
>
> To my knowledge these addresses should be internal to the pci controller
> and its devices.
>
> The addresses below tells us that system memory address 0x340000000+,
> and 0x380000000+ is mapped to bus address 0x40000000+ of each pci
> controller.

I see.

>> [...]
>> So I verified in the downstream repository of the board vendor
>> (https://github.com/friendlyarm/uboot-rockchip/blob/nanopi5-v2017.09/arch/arm/dts/rk3568.dtsi#L1754C21-L1754C31
>> and the second address there was replaced with "*0x0* *0x80000000*".
>> Then, updating this was enough to make the second interface work in u-boot.
> The bus addresses should be isolated to each pci controller if I am not
> mistaken, so changing the bus address was probably just done as a
> workaround because of some other unknown bug.

OK.

> Hum, could be an issue in pci core of U-Boot that expect unique bus
> addresses across all pci controllers.
>
> Will run some quick tests on my R5C later.

OK, thanks for looking at it. Regards, Etienne

-- 
Etienne Dublé
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