[PATCH v10 00/15] Introduce initial TI's J784S4 and AM69 support

Tom Rini trini at konsulko.com
Tue Mar 5 00:44:40 CET 2024


On Sat, Feb 24, 2024 at 01:51:38AM +0530, Apurva Nandan wrote:

> Hello Everyone!
> 
> This series will introduce basic support (SD and UART) support for Texas
> Instruments J784S4 EVM.
> 
> The J784S4 SoC device tree patches are taken from kernel patch submissions
> and will be updated as they are accepted and merged to the kernel tree.
> All other patches are specific to SPL and u-boot and do not have
> dependency on other trees. Appreciate a review for acceptance to u-boot
> tree.
> 
> Here are some of the salient features of the J784S4 automotive grade
> application processor:
> 
> The J784S4 SoC belongs to the K3 Multicore SoC architecture
> platform, providing advanced system integration in automotive,
> ADAS and industrial applications requiring AI at the network edge.
> This SoC extends the K3 Jacinto 7 family of SoCs with focus on
> raising performance and integration while providing interfaces,
> memory architecture and compute performance for multi-sensor, high
> concurrency applications.
> 
> Some highlights of this SoC are:
> * Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs,
>   4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for
>   deep learning and CNN.
> * 3D GPU: Automotive grade IMG BXS-4-64 MC1
> * Vision Processing Accelerator (VPAC) with image signal processor and Depth
>   and Motion Processing Accelerator (DMPAC)
> * Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one
>   DPI interface.
> * Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports
>   support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role
>   device subsystems, Up to 20 MCANs, among other peripherals.
> 
> See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
> for further details: http://www.ti.com/lit/zip/spruj52
> 
> In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It
> supports the following interfaces:
> * 32 GB DDR4 RAM
> * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
> * x1 Input Audio Jack, x1 Output Audio Jack
> * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
> * x2 4L PCIe connector
> * x1 UHS-1 capable micro-SD card slot
> * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
>   UFS flash.
> * x6 UART through UART-USB bridge
> * XDS110 for onboard JTAG debug using USB
> * Temperature sensors, user push buttons and LEDs
> * 40-pin User Expansion Connector
> * x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
> * x1 15-pin CSI header
> * x6 MCAN instances
> 
> Schematics: https://www.ti.com/lit/zip/sprr458
> 
> AM69 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/1b2c55d0204ff0f5a47ebbc196a97e99/raw/
> J784S4 SD mode bootlog: https://gist.githubusercontent.com/apurvanandan1997/5e2ef85ee4322798d22b57a60dc917db/raw/
> eMMC UDA moode bootlog: https://gist.githubusercontent.com/apurvanandan1997/3cffada252d50a8aa0c00a91f1f2f856/raw/
> 
> Note: This series is dependent on the following series for OF_UPSTREAM support
> https://lore.kernel.org/all/20240222093607.3085545-1-sumit.garg@linaro.org/
> 
> And, '[PATCH 01/15] Makefile: remove hardcoded device tree source directory' has been
> cherry-picked from PATCH 11 of https://lore.kernel.org/all/20240201030634.1120963-16-bb@ti.com/ by Bryan Brattlof
> 
> Changes in v10:
> 1) Fixed build failure due to missing OF_UPSTREAM in a72 defconfigs
> 2) Updated paths of board dtbs in binman.dtsi, CONFIG_OF_LIST and CONFIG_DEFAULT_DEVICE_TREE

For the series, applied to u-boot/next, thanks!

-- 
Tom
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