[PATCH v3 13/16] rockchip: jaguar-rk3588: enable SARADC and derivatives

Kever Yang kever.yang at rock-chips.com
Tue Mar 12 04:50:09 CET 2024


On 2024/3/4 19:30, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at theobroma-systems.com>
>
> The SARADC is used on Jaguar for multiple things:
> - channel 0 is used (at runtime) as a BIOS button,
> - channel 2 is exposed on the Mezzanine connector for customer specific
>    logic,
> - channel 5 and 6 are used for identification,
>
> Since the SARADC requires a vref-supply provided by the RK806 PMIC, its
> support and the support for its regulators are also enabled.
>
> The button, adc, pmic and regulator commands are also enabled for CLI
> use in U-Boot for debugging and scripting purposes.
>
> The RK806 PMIC on Jaguar being routed on the SPI bus, let's enable
> Rockchip SPI controller driver.
>
> Finally, the SARADC channel 1 on Jaguar is hardwired so will never
> change in the lifetime of a unit, for that reason, disable the Rockchip
> Download Mode check by setting ROCKCHIP_BOOT_MODE_REG symbol to 0.
>
> Cc: Quentin Schulz <foss+uboot at 0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz at theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
>   configs/jaguar-rk3588_defconfig | 10 +++++++++-
>   1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig
> index f55bfb1c82b..275d70ae008 100644
> --- a/configs/jaguar-rk3588_defconfig
> +++ b/configs/jaguar-rk3588_defconfig
> @@ -15,6 +15,7 @@ CONFIG_ENV_SIZE=0x1f000
>   CONFIG_DEFAULT_DEVICE_TREE="rk3588-jaguar"
>   CONFIG_ROCKCHIP_RK3588=y
>   CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
>   CONFIG_SPL_SERIAL=y
>   CONFIG_SPL_STACK_R_ADDR=0x600000
>   CONFIG_TARGET_JAGUAR_RK3588=y
> @@ -47,6 +48,7 @@ CONFIG_SPL_ATF=y
>   # CONFIG_BOOTM_RTEMS is not set
>   # CONFIG_BOOTM_VXWORKS is not set
>   # CONFIG_CMD_ELF is not set
> +CONFIG_CMD_ADC=y
>   CONFIG_CMD_GPIO=y
>   CONFIG_CMD_GPT=y
>   CONFIG_CMD_I2C=y
> @@ -59,6 +61,7 @@ CONFIG_CMD_USB=y
>   # CONFIG_CMD_MII is not set
>   # CONFIG_CMD_BLOCK_CACHE is not set
>   # CONFIG_CMD_EFICONFIG is not set
> +CONFIG_CMD_PMIC=y
>   CONFIG_CMD_REGULATOR=y
>   CONFIG_CMD_EROFS=y
>   CONFIG_CMD_SQUASHFS=y
> @@ -73,7 +76,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>   CONFIG_SPL_DM_SEQ_ALIAS=y
>   CONFIG_SPL_REGMAP=y
>   CONFIG_SPL_SYSCON=y
> -# CONFIG_SARADC_ROCKCHIP is not set
> +CONFIG_BUTTON=y
> +CONFIG_BUTTON_ADC=y
>   CONFIG_SPL_CLK=y
>   CONFIG_CLK_GPIO=y
>   CONFIG_ROCKCHIP_GPIO=y
> @@ -101,10 +105,14 @@ CONFIG_DWC_ETH_QOS=y
>   CONFIG_DWC_ETH_QOS_ROCKCHIP=y
>   CONFIG_PHY_ROCKCHIP_INNO_USB2=y
>   CONFIG_SPL_PINCTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_PMIC_RK8XX=y
> +CONFIG_REGULATOR_RK8XX=y
>   CONFIG_SPL_RAM=y
>   CONFIG_SCSI=y
>   CONFIG_DEBUG_UART_SHIFT=2
>   CONFIG_SYS_NS16550_MEM32=y
> +CONFIG_ROCKCHIP_SPI=y
>   CONFIG_SYSRESET=y
>   CONFIG_USB=y
>   CONFIG_USB_EHCI_HCD=y
>


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