[PATCH] riscv: dts: jh7110: Enable PLL node in SPL
Hal Feng
hal.feng at starfivetech.com
Tue Mar 12 07:09:27 CET 2024
> On 06.03.24 11:00, Bo Gan wrote:
>
> Previously PLL node was missing from SPL dts. This caused BUS_ROOT to stay on
> OSC clock (24Mhz). As a result, all peripherals have to run at a much lower
> frequency, and loading from sdcard/emmc is slow.
> Thus, enabling PLL node in dts to fix this.
>
> Signed-off-by: Bo Gan <ganboing at gmail.com>
Reviewed-by: Hal Feng <hal.feng at starfivetech.com>
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