[PATCH v2] arm64: zynqmp: Add label to pmu fwnode

Michal Simek michal.simek at amd.com
Tue Mar 12 16:11:09 CET 2024



On 3/7/24 16:29, lukas.funke-oss at weidmueller.com wrote:
> From: Lukas Funke <lukas.funke at weidmueller.com>
> 
> ZynqMP CG series devices only have two cpus. In this
> case the interrupt-affinity property has to adapted, because
> cpu3 and cpu4 are missing. By adding a label to the pmu fwnode the
> interrupt-affinity can be adapted in a device specific DT.
> 
> Signed-off-by: Lukas Funke <lukas.funke at weidmueller.com>
> ---
>   arch/arm/dts/zynqmp.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index b50b83b772..457f8e394f 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -168,7 +168,7 @@
>   		bootph-all;
>   	};
>   
> -	pmu {
> +	pmu: pmu {
>   		compatible = "arm,armv8-pmuv3";
>   		interrupt-parent = <&gic>;
>   		interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,

Applied.
M


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