[PATCH v2 15/15] rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash

[Kever Yang]

On 2024/2/17 08:22, Jonas Karlman wrote:
> Add Kconfig options to enable support for booting from SPI NOR flash on
> Orange Pi R1 Plus boards.
>
> The generated bootable u-boot-rockchip-spi.bin can be written to 0x0 of
> SPI NOR flash. The FIT image is loaded from 0x60000, same as on RK35xx
> boards.
>
>    => sf probe
>    SF: Detected zb25vq128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
>
>    => load mmc 1:1 10000000 u-boot-rockchip-spi.bin
>    1376768 bytes read in 66 ms (19.9 MiB/s)
>
>    => sf update ${fileaddr} 0 ${filesize}
>    device 0 offset 0x0, size 0x150200
>    1126912 bytes written, 249856 bytes skipped in 14.22s, speed 100542 B/s
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
> Reviewed-by: Tianling Shen <cnsztl at gmail.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2:
> - Include SPI flash pinctrl nodes in SPL
> - Enable SPI_FLASH_XMC and SPI_FLASH_ZBIT, zb25vq128 was reported on my
>    R1 Plus LTS board.
> ---
>   .../dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi  | 16 ++++++++++++++++
>   arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 16 ++++++++++++++++
>   configs/orangepi-r1-plus-lts-rk3328_defconfig    | 10 ++++++++++
>   configs/orangepi-r1-plus-rk3328_defconfig        | 10 ++++++++++
>   4 files changed, 52 insertions(+)
>
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> index 7cdf6913795d..0dbe5a01f986 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
> @@ -17,6 +17,22 @@
>   	};
>   };
>   
> +&spi0m2_clk {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_cs0 {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_rx {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_tx {
> +	bootph-pre-ram;
> +};
> +
>   &vcc_sd {
>   	bootph-pre-ram;
>   };
> diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> index 35baeb2464bc..1af75ada1a62 100644
> --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
> @@ -17,6 +17,22 @@
>   	};
>   };
>   
> +&spi0m2_clk {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_cs0 {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_rx {
> +	bootph-pre-ram;
> +};
> +
> +&spi0m2_tx {
> +	bootph-pre-ram;
> +};
> +
>   &vcc_sd {
>   	bootph-pre-ram;
>   };
> diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> index 96d563bb4fc5..18dcf6cd4fa6 100644
> --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
>   CONFIG_DM_RESET=y
>   CONFIG_ROCKCHIP_RK3328=y
>   CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>   CONFIG_TPL_LIBCOMMON_SUPPORT=y
>   CONFIG_TPL_LIBGENERIC_SUPPORT=y
>   CONFIG_SPL_STACK_R_ADDR=0x600000
> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>   CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
>   CONFIG_SYS_LOAD_ADDR=0x800800
>   CONFIG_DEBUG_UART=y
>   # CONFIG_ANDROID_BOOT_IMAGE is not set
> @@ -41,6 +44,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>   # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>   CONFIG_SPL_STACK_R=y
>   CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>   CONFIG_SPL_ATF=y
>   CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>   CONFIG_TPL_SYS_MALLOC_SIMPLE=y
> @@ -77,7 +82,12 @@ CONFIG_MISC=y
>   CONFIG_ROCKCHIP_EFUSE=y
>   CONFIG_MMC_DW=y
>   CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>   CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_XMC=y
> +CONFIG_SPI_FLASH_ZBIT=y
>   CONFIG_PHY_MOTORCOMM=y
>   CONFIG_PHY_REALTEK=y
>   CONFIG_DM_MDIO=y
> diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig
> index dfb05f176553..1078f2ff886f 100644
> --- a/configs/orangepi-r1-plus-rk3328_defconfig
> +++ b/configs/orangepi-r1-plus-rk3328_defconfig
> @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus"
>   CONFIG_DM_RESET=y
>   CONFIG_ROCKCHIP_RK3328=y
>   CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
> +CONFIG_ROCKCHIP_SPI_IMAGE=y
>   CONFIG_TPL_LIBCOMMON_SUPPORT=y
>   CONFIG_TPL_LIBGENERIC_SUPPORT=y
>   CONFIG_SPL_STACK_R_ADDR=0x600000
> @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x400000
>   CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
>   CONFIG_DEBUG_UART_BASE=0xFF130000
>   CONFIG_DEBUG_UART_CLOCK=24000000
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> +CONFIG_SPL_SPI=y
>   CONFIG_SYS_LOAD_ADDR=0x800800
>   CONFIG_DEBUG_UART=y
>   # CONFIG_ANDROID_BOOT_IMAGE is not set
> @@ -41,6 +44,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
>   # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
>   CONFIG_SPL_STACK_R=y
>   CONFIG_SPL_POWER=y
> +CONFIG_SPL_SPI_LOAD=y
> +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
>   CONFIG_SPL_ATF=y
>   CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
>   CONFIG_TPL_SYS_MALLOC_SIMPLE=y
> @@ -77,7 +82,12 @@ CONFIG_MISC=y
>   CONFIG_ROCKCHIP_EFUSE=y
>   CONFIG_MMC_DW=y
>   CONFIG_MMC_DW_ROCKCHIP=y
> +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
>   CONFIG_SPI_FLASH_GIGADEVICE=y
> +CONFIG_SPI_FLASH_MACRONIX=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_SPI_FLASH_XMC=y
> +CONFIG_SPI_FLASH_ZBIT=y
>   CONFIG_PHY_MOTORCOMM=y
>   CONFIG_PHY_REALTEK=y
>   CONFIG_DM_MDIO=y