[PATCH] clk: Propagate clk_set_rate() if CLK_SET_PARENT_RATE present

Sean Anderson seanga2 at gmail.com
Wed Mar 20 15:41:08 CET 2024


On 3/20/24 10:02, Yang Xiwen wrote:
> On 3/20/2024 2:42 AM, Sam Protsenko wrote:
>> On Thu, Mar 7, 2024 at 6:04 PM Sam Protsenko <semen.protsenko at linaro.org> wrote:
>>> Sometimes clocks provided to a consumer might not have .set_rate
>>> operation (like gate or mux clocks), but have CLK_SET_PARENT_RATE flag
>>> set. In that case it's usually possible to find a parent up the tree
>>> which is capable of setting the rate (div, pll, etc). Implement a simple
>>> lookup procedure for such cases, to traverse the clock tree until
>>> .set_rate capable parent is found, and use that parent to actually
>>> change the rate. The search will stop once the first .set_rate capable
>>> clock is found, which is usually enough to handle most cases.
>>>
>>> Signed-off-by: Sam Protsenko <semen.protsenko at linaro.org>
>>> ---
>> Hi Lukasz, Sean, Tom,
>>
>> If this patch looks good to you and there are no outstanding comments,
>> can you please apply it? It's needed as a part of eMMC enablement for
>> E850-96 board, as eMMC gate (leaf) clock is specified as ciu clock in
>> dts, which requires further clock rate change propagation up to
>> divider clock.
>>
>> Thanks!
> 
> 
> Please be patient. The release cycle is quite long. My patch set for HiSilicon clk framework has been ignored for ~2months already.

Sorry, I've been busy IRL recently.

I will try to review patches in the backlog, but it might be a few more weeks.

--Sean


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