[PATCH v4 00/11] imx8mp: Enable PCIe/NVMe support
Sumit Garg
sumit.garg at linaro.org
Thu Mar 21 15:54:56 CET 2024
pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
rather tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets reuse those common
bits instead as a new driver for iMX8 SoCs. It should be fairly easy to
add support for other iMX8 variants to this driver.
iMX8MP SoC also comes up with standalone PCIe PHY support, so hence we
can reuse the generic PHY infrastructure to power on PCIe PHY.
Testing with this patch-set included:
Verdin iMX8MP # pci enum
PCIE-0: Link up (Gen1-x1, Bus0)
Verdin iMX8MP #
Verdin iMX8MP # nvme scan
Verdin iMX8MP #
Verdin iMX8MP # nvme info
Device 0: Vendor: 0x126f Rev: T0828A0 Prod: AA000000000000000720
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Verdin iMX8MP #
Verdin iMX8MP # load nvme 0 $loadaddr <file-name>
Changes in v4:
- Incorporated misc comments from Marek and added his review tag.
- Dropped patch #4 (imx8mp: power-domain: Don't power off pd_bus)
since power domain off path is never excercised for DT based devices.
- Added patch#8 as suggested by Peter to describe older pcie_imx.c
driver as legacy one.
Changes in v3:
- Rebased on top of U-Boot next.
- Incorporated misc. updates to commit messages.
- New patch#2 to refactor reset driver function names.
- Patch#3: Refactored further for better code reuse.
- New patch#4 to fix refcount issue with power domain bus.
- Patch#5: Refactored further for better code reuse.
- Patch#7 & #8: Added dependency on REGMAP and SYSCON. Also, added
support for vpcie-supply regulator.
- Patch#7 & #8: Added error paths and .remove callback.
- New patch#10 to enable PCIe/NVMe for imx8mp_venice*.
Changes in v2:
- Renamed PCIe IMX driver pcie_dw_imx8.c -> pcie_dw_imx.c.
- Added myself as maintainer for PCIe DWC IMX driver support.
- Incorporated various code and commit message improvement suggestions
from Marek, thanks.
- Patch#3: Gate PCIe and USB clocks behind corresponding power domain
IDs.
- Patch#4: Expose HSIO PLL clocks as a regular clock driver instead
similar to what Linux kernel does.
- Patch#7: Picked up tags.
Sumit Garg (10):
clk: imx8mp: Add support for PCIe clocks
reset: imx: Refactor driver to simplify function names
reset: imx: Add support for i.MX8MP reset controller
imx8mp: power-domain: Add PCIe support
imx8mp: power-domain: Expose high performance PLL clock
phy: phy-imx8m-pcie: Add support for i.MX8M{M/P} PCIe PHY
pci: Add DW PCIe controller support for iMX8MP SoC
pcie_imx: Update header to describe it as a legacy driver
verdin-imx8mp_defconfig: Enable PCIe/NVMe support
MAINTAINERS: Add entry for PCIe DWC IMX driver
Tim Harvey (1):
imx8mp_venice_defconfig: Enable PCIe/NVMe support
MAINTAINERS | 6 +
configs/imx8mp_venice_defconfig | 8 +
configs/verdin-imx8mp_defconfig | 6 +
drivers/clk/imx/clk-imx8mp.c | 6 +
drivers/pci/Kconfig | 11 +
drivers/pci/Makefile | 1 +
drivers/pci/pcie_dw_imx.c | 338 ++++++++++++++++++++++++++
drivers/pci/pcie_imx.c | 8 +
drivers/phy/Kconfig | 11 +
drivers/phy/Makefile | 1 +
drivers/phy/phy-imx8m-pcie.c | 283 +++++++++++++++++++++
drivers/power/domain/imx8mp-hsiomix.c | 190 ++++++++++++---
drivers/reset/reset-imx7.c | 143 +++++++++--
13 files changed, 955 insertions(+), 57 deletions(-)
create mode 100644 drivers/pci/pcie_dw_imx.c
create mode 100644 drivers/phy/phy-imx8m-pcie.c
--
2.34.1
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