[PATCH v1 2/2] riscv: support extension probing using riscv, isa-extensions

Leo Liang ycliang at andestech.com
Thu Mar 28 08:12:43 CET 2024


On Mon, Mar 18, 2024 at 03:16:03PM +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley at microchip.com>
> 
> A new property has been added, with an extensive rationale at [1], that
> can be used in place of "riscv,isa" to indicate what extensions are
> supported by a given platform that is a list of strings rather than a
> single string. There are some differences between the new property,
> "riscv,isa-extensions" and the incumbent "riscv,isa" - chief among them
> for the sake of parsing being the list of strings, as opposed to a
> string. Another advantage is strictly defined meanings for each string
> in a dt-binding, rather than deriving meaning from RVI standards. This
> will likely to some divergence over time, but U-Boot's current use of
> extension detection is very limited - there are just four callsites of
> supports_extension() in mainline U-Boot.
> 
> These checks are limited to two checks for FPU support and two checks
> for "s" and "u". "s" and "u" are not supported by the new property, but
> they were also not permitted in "riscv,isa". These checks are only
> meaningful (or run) in M-Mode, in which case supports_extension() does
> not parse the devicetree anyway.
> 
> Add support for the new property in U-Boot, prioritising it, before
> falling back to the, now deprecated, "riscv,isa" property if it is not
> present.
> 
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
> I moved the kernel devicetrees to use the new properties, I'd do the
> same here, but I'd rather just move things to use dt-rebasing instead,
> where possible.
> ---
>  arch/riscv/cpu/cpu.c | 56 +++++++++++++++++++++++++++-----------------
>  1 file changed, 35 insertions(+), 21 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>


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