[PATCH v2 13/18] rockchip: rk3399: Sort nodes in u-boot.dtsi files

[Kever Yang]

On 2024/4/30 23:30, Jonas Karlman wrote:
> Sort nodes alphabetically by name, symbol or reg addr in RK3399 related
> u-boot.dtsi files. Also remove one of the duplicated &pmu nodes.
>
> Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> v2: New patch split from "Fix loading FIT from SD-card" patch
> ---
>   arch/arm/dts/rk3399-evb-u-boot.dtsi    | 24 ++++++++---------
>   arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 12 ++++-----
>   arch/arm/dts/rk3399-u-boot.dtsi        | 37 ++++++++++++--------------
>   3 files changed, 35 insertions(+), 38 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
> index 9df4a02c3e74..6dedfeec0722 100644
> --- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
> @@ -20,6 +20,18 @@
>   	bootph-all;
>   };
>   
> +&sdmmc {
> +	bus-width = <4>;
> +	cap-mmc-highspeed;
> +	cap-sd-highspeed;
> +	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
> +	disable-wp;
> +	max-frequency = <150000000>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
> +	status = "okay";
> +};
> +
>   &tcphy1 {
>   	status = "okay";
>   };
> @@ -36,15 +48,3 @@
>   &vdd_center {
>   	regulator-init-microvolt = <900000>;
>   };
> -
> -&sdmmc {
> -	bus-width = <4>;
> -	cap-mmc-highspeed;
> -	cap-sd-highspeed;
> -	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
> -	disable-wp;
> -	max-frequency = <150000000>;
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
> -	status = "okay";
> -};
> diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> index e390cf3abab5..58a3c0afcddd 100644
> --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
> @@ -38,12 +38,11 @@
>   	};
>   };
>   
> -&vdd_log {
> -	regulator-min-microvolt = <430000>;
> -	regulator-init-microvolt = <950000>;
> +&vcc5v0_host {
> +	regulator-always-on;
>   };
>   
> -&vcc5v0_host {
> +&vcc_sdio {
>   	regulator-always-on;
>   };
>   
> @@ -51,6 +50,7 @@
>   	regulator-always-on;
>   };
>   
> -&vcc_sdio {
> -	regulator-always-on;
> +&vdd_log {
> +	regulator-min-microvolt = <430000>;
> +	regulator-init-microvolt = <950000>;
>   };
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 96523a138ae3..b9b8d3ee1d92 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -18,19 +18,25 @@
>   		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
>   	};
>   
> -	cic: syscon at ff620000 {
> +	pmusgrf: syscon at ff330000 {
> +		compatible = "rockchip,rk3399-pmusgrf", "syscon";
> +		reg = <0x0 0xff330000 0x0 0xe3d4>;
>   		bootph-all;
> +	};
> +
> +	cic: syscon at ff620000 {
>   		compatible = "rockchip,rk3399-cic", "syscon";
>   		reg = <0x0 0xff620000 0x0 0x100>;
> +		bootph-all;
>   	};
>   
>   	dfi: dfi at ff630000 {
> -		bootph-all;
>   		reg = <0x00 0xff630000 0x00 0x4000>;
>   		compatible = "rockchip,rk3399-dfi";
>   		rockchip,pmu = <&pmugrf>;
>   		clocks = <&cru PCLK_DDR_MON>;
>   		clock-names = "pclk_ddr_mon";
> +		bootph-all;
>   	};
>   
>   	rng: rng at ff8b8000 {
> @@ -39,12 +45,7 @@
>   	};
>   
>   	dmc: dmc {
> -		bootph-all;
>   		compatible = "rockchip,rk3399-dmc";
> -		devfreq-events = <&dfi>;
> -		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
> -		clocks = <&cru SCLK_DDRCLK>;
> -		clock-names = "dmc_clk";
>   		reg = <0x0 0xffa80000 0x0 0x0800
>   		       0x0 0xffa80800 0x0 0x1800
>   		       0x0 0xffa82000 0x0 0x2000
> @@ -53,14 +54,12 @@
>   		       0x0 0xffa88800 0x0 0x1800
>   		       0x0 0xffa8a000 0x0 0x2000
>   		       0x0 0xffa8c000 0x0 0x1000>;
> -	};
> -
> -	pmusgrf: syscon at ff330000 {
> +		devfreq-events = <&dfi>;
> +		interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
> +		clocks = <&cru SCLK_DDRCLK>;
> +		clock-names = "dmc_clk";
>   		bootph-all;
> -		compatible = "rockchip,rk3399-pmusgrf", "syscon";
> -		reg = <0x0 0xff330000 0x0 0xe3d4>;
>   	};
> -
>   };
>   
>   #if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
> @@ -108,21 +107,19 @@
>   	bootph-all;
>   };
>   
> -&pmugrf {
> -	bootph-all;
> -};
> -
> -&pmu {
> +&pmucru {
>   	bootph-all;
>   };
>   
> -&pmucru {
> +&pmugrf {
>   	bootph-all;
>   };
>   
>   &sdhci {
> -	max-frequency = <200000000>;
>   	bootph-all;
> +	max-frequency = <200000000>;
> +
> +	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
>   	u-boot,spl-fifo-mode;
>   };
>