[PATCH] board: rockchip: add ArmSoM Sige7 Rk3588 board
Jianfeng Liu
liujianfeng1994 at gmail.com
Mon May 6 11:59:00 CEST 2024
Hi Quentin,
Many thanks to your review.
On May 6, 2024, 8:54 a.m. UTC, Quentin Schulz wrote:
>> F: arch/arm/include/asm/arch-rockchip/
>> F: arch/arm/mach-rockchip/
>> F: board/amarula/vyasa-rk3288/
>> +F: board/armsom/sige7-rk3588/
>
>Can you order this alphabetically please?
Sure, I will fix it.
>> +&sdhci {
>> + cap-mmc-highspeed;
>
>I think this isn't supported in U-Boot on RK35xx devices just yet? We
>force everything to be HS200+ anyway if I remember correctly.
I use the same devicetree as rock5b[1] and I haven't encountered issues.
I also remember kernel driver has issues with mmc-hs400, which will cause
system unstable, but it seems that this is fine in u-boot.
[1]
https://github.com/u-boot/u-boot/blob/bcaf6c0570deb7dcd3c029d2e74efea740a0b20a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi#L34
>I would recommend using
>arch/arm/dts/rk3588-armsom-sige7* here instead, as to not have to
>maintain a list of DTSes (e.g. if overlays are supported one day?)
Sure, I will change it.
>The wiki doesn't seem to indicate there's any SPI flash on that device
>so I don't think we need to support anything related to it, especially
>the creation of the image to flash on an SPI nor?
Yes there is no spi flash on board. I will delete those SPI flash related
configs.
>> +CONFIG_USB_HOST_ETHER=y
>> +CONFIG_USB_ETHER_ASIX=y
>> +CONFIG_USB_ETHER_ASIX88179=y
>> +CONFIG_USB_ETHER_LAN75XX=y
>> +CONFIG_USB_ETHER_LAN78XX=y
>> +CONFIG_USB_ETHER_MCS7830=y
>> +CONFIG_USB_ETHER_RTL8152=y
>> +CONFIG_USB_ETHER_SMSC95XX=y
>
>I'm surprised to see USB_ETHER support here? Is this something done on
>purpose? The board already has two 2.5Gbps Ethernet, are they not working?
I copied these configs from rock5b. I guess someone should have the need
to do net boot through usb ethernet since there is also usb support.
Best regards,
Jianfeng
Quentin Schulz <quentin.schulz at cherry.de> 于2024年5月6日周一 16:54写道：
> Hi Jianfeng Liu,
>
> On 5/4/24 7:05 PM, Jianfeng Liu wrote:
> > [You don't often get email from liujianfeng1994 at gmail.com. Learn why
> this is important at https://aka.ms/LearnAboutSenderIdentification ]
> >
> > ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
> > ArmSoM.
> >
> > There are two variants depending on the DRAM size : 8G and 16G.
> >
> > Specification:
> >
> > Rockchip Rk3588 SoC
> > 4x ARM Cortex-A76, 4x ARM Cortex-A55
> > 8/16GB memory LPDDR4x
> > Mali G610MC4 GPU
> > 2x MIPI CSI 2 multiple lanes connector
> > 64GB/128GB on board eMMC
> > uSD slot
> > 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
> > 1x HDMI 2.1 output
> > 2x 2.5 Gbps Ethernet port
> > 40-pin IO header including UART, SPI and I2C
> > USB PD over USB Type-C
> > Size: 92mm x 62mm
> >
> > Kernel commit:
> > 81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)
> >
> > Note that these commits:
> > - e18e5e8188f2 (arm64: dts: rockchip: add USBDP phys on rk3588)
> > - 6fca4edb93d3 (arm64: dts: rockchip: Add rk3588 GPU node)
> > are not synced to u-boot, so I remove usb3 drd nodes and gpu from kernel
> > devicetree.
> >
> > Signed-off-by: Jianfeng Liu <liujianfeng1994 at gmail.com>
> > ---
> >
> > MAINTAINERS | 1 +
> > arch/arm/dts/Makefile | 1 +
> > arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 31 +
> > arch/arm/dts/rk3588-armsom-sige7.dts | 691 +++++++++++++++++++
> > arch/arm/mach-rockchip/rk3588/Kconfig | 26 +
> > board/armsom/sige7-rk3588/Kconfig | 12 +
> > board/armsom/sige7-rk3588/MAINTAINERS | 8 +
> > configs/sige7-rk3588_defconfig | 104 +++
> > doc/board/rockchip/rockchip.rst | 1 +
> > include/configs/sige7-rk3588.h | 15 +
> > 10 files changed, 890 insertions(+)
> > create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> > create mode 100644 arch/arm/dts/rk3588-armsom-sige7.dts
> > create mode 100644 board/armsom/sige7-rk3588/Kconfig
> > create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS
> > create mode 100644 configs/sige7-rk3588_defconfig
> > create mode 100644 include/configs/sige7-rk3588.h
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 7a3b4d3712..52367bf38c 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -532,6 +532,7 @@ F: arch/arm/dts/rv11*
> > F: arch/arm/include/asm/arch-rockchip/
> > F: arch/arm/mach-rockchip/
> > F: board/amarula/vyasa-rk3288/
> > +F: board/armsom/sige7-rk3588/
>
> Can you order this alphabetically please?
>
> > F: board/anbernic/rgxx3_rk3566/
> > F: board/chipspark/popmetal_rk3288
> > F: board/engicam/px30_core/
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index c9f1b25ad6..040238dede 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -166,6 +166,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
> > rk3568-rock-3a.dtb
> >
> > dtb-$(CONFIG_ROCKCHIP_RK3588) += \
> > + rk3588-armsom-sige7.dtb \
> > rk3588s-coolpi-4b.dtb \
> > rk3588-coolpi-cm5-evb.dtb \
> > rk3588-edgeble-neu6a-io.dtb \
> > diff --git a/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> > new file mode 100644
> > index 0000000000..b9196ba5f5
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> > @@ -0,0 +1,31 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright (c) 2024 ArmSoM Technology Co., Ltd.
> > + */
> > +
> > +#include "rk3588-u-boot.dtsi"
> > +
> > +&sdhci {
> > + cap-mmc-highspeed;
>
> I think this isn't supported in U-Boot on RK35xx devices just yet? We
> force everything to be HS200+ anyway if I remember correctly.
>
> > + mmc-hs200-1_8v;
> > +};
> > +
> > +&u2phy1 {
> > + status = "okay";
> > +};
> > +
> > +&u2phy1_otg {
> > + status = "okay";
> > +};
> > +
> > +&usbdp_phy1 {
> > + status = "okay";
> > +};
> > +
> > +&usbdp_phy1_u3 {
> > + status = "okay";
> > +};
> > +
> > +&usb_host1_xhci {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm/dts/rk3588-armsom-sige7.dts
> b/arch/arm/dts/rk3588-armsom-sige7.dts
> > new file mode 100644
> > index 0000000000..c7b46536ec
> > --- /dev/null
> > +++ b/arch/arm/dts/rk3588-armsom-sige7.dts
> > @@ -0,0 +1,691 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include "rk3588.dtsi"
> > +
> > +/ {
> > + model = "ArmSoM Sige7";
> > + compatible = "armsom,sige7", "rockchip,rk3588";
> > +
> > + aliases {
> > + mmc0 = &sdhci;
> > + mmc1 = &sdmmc;
> > + };
> > +
> > + chosen {
> > + stdout-path = "serial2:1500000n8";
> > + };
> > +
> > + analog-sound {
> > + compatible = "audio-graph-card";
> > + dais = <&i2s0_8ch_p0>;
> > + label = "rk3588-es8316";
> > + hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&hp_detect>;
> > + routing = "MIC2", "Mic Jack",
> > + "Headphones", "HPOL",
> > + "Headphones", "HPOR";
> > + widgets = "Microphone", "Mic Jack",
> > + "Headphone", "Headphones";
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&led_rgb_g>;
> > +
> > + led_green: led-0 {
> > + color = <LED_COLOR_ID_GREEN>;
> > + function = LED_FUNCTION_STATUS;
> > + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "heartbeat";
> > + };
> > +
> > + led_red: led-1 {
> > + color = <LED_COLOR_ID_RED>;
> > + function = LED_FUNCTION_STATUS;
> > + gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "none";
> > + };
> > + };
> > +
> > + fan: pwm-fan {
> > + compatible = "pwm-fan";
> > + cooling-levels = <0 95 145 195 255>;
> > + fan-supply = <&vcc5v0_sys>;
> > + pwms = <&pwm1 0 50000 0>;
> > + #cooling-cells = <2>;
> > + };
> > +
> > + vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc3v3_pcie2x1l2";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + startup-delay-us = <5000>;
> > + vin-supply = <&vcc_3v3_s3>;
> > + };
> > +
> > + vcc3v3_pcie30: vcc3v3-pcie30-regulator {
> > + compatible = "regulator-fixed";
> > + enable-active-high;
> > + gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
> > + regulator-name = "vcc3v3_pcie30";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + startup-delay-us = <5000>;
> > + vin-supply = <&vcc5v0_sys>;
> > + };
> > +
> > + vcc5v0_host: vcc5v0-host-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc5v0_host";
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + enable-active-high;
> > + gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&vcc5v0_host_en>;
> > + vin-supply = <&vcc5v0_sys>;
> > + };
> > +
> > + vcc5v0_sys: vcc5v0-sys-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc5v0_sys";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + };
> > +
> > + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "vcc_1v1_nldo_s3";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1100000>;
> > + regulator-max-microvolt = <1100000>;
> > + vin-supply = <&vcc5v0_sys>;
> > + };
> > +};
> > +
> > +&combphy0_ps {
> > + status = "okay";
> > +};
> > +
> > +&combphy1_ps {
> > + status = "okay";
> > +};
> > +
> > +&combphy2_psu {
> > + status = "okay";
> > +};
> > +
> > +&cpu_b0 {
> > + cpu-supply = <&vdd_cpu_big0_s0>;
> > +};
> > +
> > +&cpu_b1 {
> > + cpu-supply = <&vdd_cpu_big0_s0>;
> > +};
> > +
> > +&cpu_b2 {
> > + cpu-supply = <&vdd_cpu_big1_s0>;
> > +};
> > +
> > +&cpu_b3 {
> > + cpu-supply = <&vdd_cpu_big1_s0>;
> > +};
> > +
> > +&cpu_l0 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l1 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l2 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&cpu_l3 {
> > + cpu-supply = <&vdd_cpu_lit_s0>;
> > +};
> > +
> > +&i2c0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2c0m2_xfer>;
> > + status = "okay";
> > +
> > + vdd_cpu_big0_s0: regulator at 42 {
> > + compatible = "rockchip,rk8602";
> > + reg = <0x42>;
> > + fcs,suspend-voltage-selector = <1>;
> > + regulator-name = "vdd_cpu_big0_s0";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <550000>;
> > + regulator-max-microvolt = <1050000>;
> > + regulator-ramp-delay = <2300>;
> > + vin-supply = <&vcc5v0_sys>;
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_cpu_big1_s0: regulator at 43 {
> > + compatible = "rockchip,rk8603", "rockchip,rk8602";
> > + reg = <0x43>;
> > + fcs,suspend-voltage-selector = <1>;
> > + regulator-name = "vdd_cpu_big1_s0";
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <550000>;
> > + regulator-max-microvolt = <1050000>;
> > + regulator-ramp-delay = <2300>;
> > + vin-supply = <&vcc5v0_sys>;
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +};
> > +
> > +&i2c6 {
> > + status = "okay";
> > +
> > + hym8563: rtc at 51 {
> > + compatible = "haoyu,hym8563";
> > + reg = <0x51>;
> > + interrupt-parent = <&gpio0>;
> > + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
> > + #clock-cells = <0>;
> > + clock-output-names = "hym8563";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&hym8563_int>;
> > + wakeup-source;
> > + };
> > +};
> > +
> > +&i2c7 {
> > + status = "okay";
> > +
> > + es8316: audio-codec at 11 {
> > + compatible = "everest,es8316";
> > + reg = <0x11>;
> > + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
> > + assigned-clock-rates = <12288000>;
> > + clocks = <&cru I2S0_8CH_MCLKOUT>;
> > + clock-names = "mclk";
> > + #sound-dai-cells = <0>;
> > +
> > + port {
> > + es8316_p0_0: endpoint {
> > + remote-endpoint = <&i2s0_8ch_p0_0>;
> > + };
> > + };
> > + };
> > +};
> > +
> > +&i2s0_8ch {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&i2s0_lrck
> > + &i2s0_mclk
> > + &i2s0_sclk
> > + &i2s0_sdi0
> > + &i2s0_sdo0>;
> > + status = "okay";
> > +
> > + i2s0_8ch_p0: port {
> > + i2s0_8ch_p0_0: endpoint {
> > + dai-format = "i2s";
> > + mclk-fs = <256>;
> > + remote-endpoint = <&es8316_p0_0>;
> > + };
> > + };
> > +};
> > +
> > +/* phy1 - right ethernet port */
> > +&pcie2x1l0 {
> > + reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
> > + status = "okay";
> > +};
> > +
> > +/* phy2 - WiFi */
> > +&pcie2x1l1 {
> > + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
> > + status = "okay";
> > +};
> > +
> > +/* phy0 - left ethernet port */
> > +&pcie2x1l2 {
> > + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
> > + status = "okay";
> > +};
> > +
> > +&pcie30phy {
> > + status = "okay";
> > +};
> > +
> > +&pcie3x4 {
> > + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
> > + vpcie3v3-supply = <&vcc3v3_pcie30>;
> > + status = "okay";
> > +};
> > +
> > +&pinctrl {
> > + hym8563 {
> > + hym8563_int: hym8563-int {
> > + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO
> &pcfg_pull_none>;
> > + };
> > + };
> > +
> > + leds {
> > + led_rgb_g: led-rgb-g {
> > + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO
> &pcfg_pull_none>;
> > + };
> > + led_rgb_r: led-rgb-r {
> > + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO
> &pcfg_pull_none>;
> > + };
> > + };
> > +
> > + sound {
> > + hp_detect: hp-detect {
> > + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO
> &pcfg_pull_none>;
> > + };
> > + };
> > +
> > + usb {
> > + vcc5v0_host_en: vcc5v0-host-en {
> > + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO
> &pcfg_pull_none>;
> > + };
> > + };
> > +};
> > +
> > +&pwm1 {
> > + status = "okay";
> > +};
> > +
> > +&saradc {
> > + vref-supply = <&avcc_1v8_s0>;
> > + status = "okay";
> > +};
> > +
> > +&sdhci {
> > + bus-width = <8>;
> > + no-sdio;
> > + no-sd;
> > + non-removable;
> > + mmc-hs200-1_8v;
> > + status = "okay";
> > +};
> > +
> > +&sdmmc {
> > + bus-width = <4>;
> > + cap-mmc-highspeed;
> > + cap-sd-highspeed;
> > + disable-wp;
> > + max-frequency = <200000000>;
> > + no-sdio;
> > + no-mmc;
> > + sd-uhs-sdr104;
> > + vmmc-supply = <&vcc_3v3_s3>;
> > + vqmmc-supply = <&vccio_sd_s0>;
> > + status = "okay";
> > +};
> > +
> > +&spi2 {
> > + assigned-clocks = <&cru CLK_SPI2>;
> > + assigned-clock-rates = <200000000>;
> > + num-cs = <1>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
> > + status = "okay";
> > +
> > + pmic at 0 {
> > + compatible = "rockchip,rk806";
> > + spi-max-frequency = <1000000>;
> > + reg = <0x0>;
> > +
> > + interrupt-parent = <&gpio0>;
> > + interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
> > + <&rk806_dvs2_null>, <&rk806_dvs3_null>;
> > +
> > + system-power-controller;
> > +
> > + vcc1-supply = <&vcc5v0_sys>;
> > + vcc2-supply = <&vcc5v0_sys>;
> > + vcc3-supply = <&vcc5v0_sys>;
> > + vcc4-supply = <&vcc5v0_sys>;
> > + vcc5-supply = <&vcc5v0_sys>;
> > + vcc6-supply = <&vcc5v0_sys>;
> > + vcc7-supply = <&vcc5v0_sys>;
> > + vcc8-supply = <&vcc5v0_sys>;
> > + vcc9-supply = <&vcc5v0_sys>;
> > + vcc10-supply = <&vcc5v0_sys>;
> > + vcc11-supply = <&vcc_2v0_pldo_s3>;
> > + vcc12-supply = <&vcc5v0_sys>;
> > + vcc13-supply = <&vcc_1v1_nldo_s3>;
> > + vcc14-supply = <&vcc_1v1_nldo_s3>;
> > + vcca-supply = <&vcc5v0_sys>;
> > +
> > + rk806_dvs1_null: dvs1-null-pins {
> > + pins = "gpio_pwrctrl1";
> > + function = "pin_fun0";
> > + };
> > +
> > + rk806_dvs2_null: dvs2-null-pins {
> > + pins = "gpio_pwrctrl2";
> > + function = "pin_fun0";
> > + };
> > +
> > + rk806_dvs3_null: dvs3-null-pins {
> > + pins = "gpio_pwrctrl3";
> > + function = "pin_fun0";
> > + };
> > +
> > + regulators {
> > + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <550000>;
> > + regulator-max-microvolt = <950000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_gpu_s0";
> > + regulator-enable-ramp-delay = <400>;
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <550000>;
> > + regulator-max-microvolt = <950000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_cpu_lit_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_log_s0: dcdc-reg3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <675000>;
> > + regulator-max-microvolt = <750000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_log_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + regulator-suspend-microvolt =
> <750000>;
> > + };
> > + };
> > +
> > + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <550000>;
> > + regulator-max-microvolt = <950000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_vdenc_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_ddr_s0: dcdc-reg5 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <675000>;
> > + regulator-max-microvolt = <900000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_ddr_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + regulator-suspend-microvolt =
> <850000>;
> > + };
> > + };
> > +
> > + vdd2_ddr_s3: dcdc-reg6 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-name = "vdd2_ddr_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + };
> > + };
> > +
> > + vcc_2v0_pldo_s3: dcdc-reg7 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <2000000>;
> > + regulator-max-microvolt = <2000000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vdd_2v0_pldo_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + regulator-suspend-microvolt =
> <2000000>;
> > + };
> > + };
> > +
> > + vcc_3v3_s3: dcdc-reg8 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-name = "vcc_3v3_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + regulator-suspend-microvolt =
> <3300000>;
> > + };
> > + };
> > +
> > + vddq_ddr_s0: dcdc-reg9 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-name = "vddq_ddr_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vcc_1v8_s3: dcdc-reg10 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "vcc_1v8_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + regulator-suspend-microvolt =
> <1800000>;
> > + };
> > + };
> > +
> > + avcc_1v8_s0: pldo-reg1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "avcc_1v8_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vcc_1v8_s0: pldo-reg2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "vcc_1v8_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + regulator-suspend-microvolt =
> <1800000>;
> > + };
> > + };
> > +
> > + avdd_1v2_s0: pldo-reg3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1200000>;
> > + regulator-max-microvolt = <1200000>;
> > + regulator-name = "avdd_1v2_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vcc_3v3_s0: pldo-reg4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vcc_3v3_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vccio_sd_s0: pldo-reg5 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-ramp-delay = <12500>;
> > + regulator-name = "vccio_sd_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + pldo6_s3: pldo-reg6 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-name = "pldo6_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + regulator-suspend-microvolt =
> <1800000>;
> > + };
> > + };
> > +
> > + vdd_0v75_s3: nldo-reg1 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <750000>;
> > + regulator-max-microvolt = <750000>;
> > + regulator-name = "vdd_0v75_s3";
> > +
> > + regulator-state-mem {
> > + regulator-on-in-suspend;
> > + regulator-suspend-microvolt =
> <750000>;
> > + };
> > + };
> > +
> > + vdd_ddr_pll_s0: nldo-reg2 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <850000>;
> > + regulator-max-microvolt = <850000>;
> > + regulator-name = "vdd_ddr_pll_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + regulator-suspend-microvolt =
> <850000>;
> > + };
> > + };
> > +
> > + avdd_0v75_s0: nldo-reg3 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <750000>;
> > + regulator-max-microvolt = <750000>;
> > + regulator-name = "avdd_0v75_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_0v85_s0: nldo-reg4 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <850000>;
> > + regulator-max-microvolt = <850000>;
> > + regulator-name = "vdd_0v85_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > +
> > + vdd_0v75_s0: nldo-reg5 {
> > + regulator-always-on;
> > + regulator-boot-on;
> > + regulator-min-microvolt = <750000>;
> > + regulator-max-microvolt = <750000>;
> > + regulator-name = "vdd_0v75_s0";
> > +
> > + regulator-state-mem {
> > + regulator-off-in-suspend;
> > + };
> > + };
> > + };
> > + };
> > +};
> > +
> > +&u2phy3 {
> > + status = "okay";
> > +};
> > +
> > +&u2phy3_host {
> > + phy-supply = <&vcc5v0_host>;
> > + status = "okay";
> > +};
> > +
> > +&uart2 {
> > + pinctrl-0 = <&uart2m0_xfer>;
> > + status = "okay";
> > +};
> > +
> > +&usb_host1_ehci {
> > + status = "okay";
> > +};
> > +
> > +&usb_host1_ohci {
> > + status = "okay";
> > +};
> > diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig
> b/arch/arm/mach-rockchip/rk3588/Kconfig
> > index 39049ab35a..4c14b0be1e 100644
> > --- a/arch/arm/mach-rockchip/rk3588/Kconfig
> > +++ b/arch/arm/mach-rockchip/rk3588/Kconfig
> > @@ -152,6 +152,31 @@ config TARGET_ROCK5B_RK3588
> > USB PD over USB Type-C
> > Size: 100mm x 72mm (Pico-ITX form factor)
> >
> > +config TARGET_SIGE7_RK3588
> > + bool "ArmSoM Sige7 RK3588 board"
> > + select BOARD_LATE_INIT
> > + help
> > + ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board
> Computer)
> > + by ArmSoM.
> > +
> > + There are two variants depending on the DRAM size : 8G and 16G.
> > +
> > + Specification:
> > +
> > + Rockchip Rk3588 SoC
> > + 4x ARM Cortex-A76, 4x ARM Cortex-A55
> > + 8/16GB memory LPDDR4x
> > + Mali G610MC4 GPU
> > + 2x MIPI CSI 2 multiple lanes connector
> > + 64GB/128GB on board eMMC
> > + uSD slot
> > + 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
> > + 1x HDMI 2.1 output
> > + 2x 2.5 Gbps Ethernet port
> > + 40-pin IO header including UART, SPI and I2C
> > + USB PD over USB Type-C
> > + Size: 92mm x 62mm
> > +
> > config TARGET_QUARTZPRO64_RK3588
> > bool "Pine64 QuartzPro64 RK3588 board"
> > select BOARD_LATE_INIT
> > @@ -221,6 +246,7 @@ config ROCKCHIP_COMMON_STACK_ADDR
> > config TEXT_BASE
> > default 0x00a00000
> >
> > +source "board/armsom/sige7-rk3588/Kconfig"
> > source "board/edgeble/neural-compute-module-6/Kconfig"
> > source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
> > source "board/pine64/quartzpro64-rk3588/Kconfig"
> > diff --git a/board/armsom/sige7-rk3588/Kconfig
> b/board/armsom/sige7-rk3588/Kconfig
> > new file mode 100644
> > index 0000000000..793985f531
> > --- /dev/null
> > +++ b/board/armsom/sige7-rk3588/Kconfig
> > @@ -0,0 +1,12 @@
> > +if TARGET_SIGE7_RK3588
> > +
> > +config SYS_BOARD
> > + default "sige7-rk3588"
> > +
> > +config SYS_VENDOR
> > + default "armsom"
> > +
> > +config SYS_CONFIG_NAME
> > + default "sige7-rk3588"
> > +
> > +endif
> > diff --git a/board/armsom/sige7-rk3588/MAINTAINERS
> b/board/armsom/sige7-rk3588/MAINTAINERS
> > new file mode 100644
> > index 0000000000..0b84946284
> > --- /dev/null
> > +++ b/board/armsom/sige7-rk3588/MAINTAINERS
> > @@ -0,0 +1,8 @@
> > +SIGE7-RK3588
> > +M: Jianfeng Liu <liujianfeng1994 at gmail.com>
> > +S: Maintained
> > +F: board/armsom/sige7-rk3588
> > +F: include/configs/sige7-rk3588.h
> > +F: configs/sige7-rk3588_defconfig
> > +F: arch/arm/dts/rk3588-armsom-sige7.dts
> > +F: arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
>
> I would recommend using
> arch/arm/dts/rk3588-armsom-sige7* here instead, as to not have to
> maintain a list of DTSes (e.g. if overlays are supported one day?)
>
> > diff --git a/configs/sige7-rk3588_defconfig
> b/configs/sige7-rk3588_defconfig
> > new file mode 100644
> > index 0000000000..76fcd2878c
> > --- /dev/null
> > +++ b/configs/sige7-rk3588_defconfig
> > @@ -0,0 +1,104 @@
> > +CONFIG_ARM=y
> > +CONFIG_SKIP_LOWLEVEL_INIT=y
> > +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
> > +CONFIG_COUNTER_FREQUENCY=24000000
> > +CONFIG_ARCH_ROCKCHIP=y
> > +CONFIG_SF_DEFAULT_SPEED=24000000
> > +CONFIG_SF_DEFAULT_MODE=0x2000
> > +CONFIG_DEFAULT_DEVICE_TREE="rk3588-armsom-sige7"
> > +CONFIG_ROCKCHIP_RK3588=y
> > +CONFIG_ROCKCHIP_SPI_IMAGE=y
>
> The wiki doesn't seem to indicate there's any SPI flash on that device
> so I don't think we need to support anything related to it, especially
> the creation of the image to flash on an SPI nor?
>
> > +CONFIG_SPL_SERIAL=y
> > +CONFIG_TARGET_SIGE7_RK3588=y
> > +CONFIG_DEBUG_UART_BASE=0xFEB50000
> > +CONFIG_DEBUG_UART_CLOCK=24000000
> > +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> > +CONFIG_SPL_SPI=y
> > +CONFIG_SYS_LOAD_ADDR=0xc00800
> > +CONFIG_PCI=y
> > +CONFIG_DEBUG_UART=y
> > +CONFIG_AHCI=y
> > +CONFIG_FIT=y
> > +CONFIG_FIT_VERBOSE=y
> > +CONFIG_SPL_FIT_SIGNATURE=y
> > +CONFIG_SPL_LOAD_FIT=y
> > +CONFIG_LEGACY_IMAGE_FORMAT=y
> > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-armsom-sige7.dtb"
> > +# CONFIG_DISPLAY_CPUINFO is not set
> > +CONFIG_DISPLAY_BOARDINFO_LATE=y
> > +CONFIG_SPL_MAX_SIZE=0x40000
> > +CONFIG_SPL_PAD_TO=0x7f8000
> > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> > +CONFIG_SPL_SPI_LOAD=y
> > +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
> > +CONFIG_SPL_ATF=y
> > +CONFIG_CMD_GPIO=y
> > +CONFIG_CMD_GPT=y
> > +CONFIG_CMD_I2C=y
> > +CONFIG_CMD_MMC=y
> > +CONFIG_CMD_PCI=y
> > +CONFIG_CMD_USB=y
> > +CONFIG_CMD_ROCKUSB=y
> > +# CONFIG_CMD_SETEXPR is not set
> > +CONFIG_CMD_REGULATOR=y
> > +# CONFIG_SPL_DOS_PARTITION is not set
> > +CONFIG_SPL_OF_CONTROL=y
> > +CONFIG_OF_LIVE=y
> > +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent
> assigned-clocks assigned-clock-rates assigned-clock-parents"
> > +CONFIG_SPL_DM_SEQ_ALIAS=y
> > +CONFIG_SPL_REGMAP=y
> > +CONFIG_SPL_SYSCON=y
> > +CONFIG_AHCI_PCI=y
> > +CONFIG_DWC_AHCI=y
> > +CONFIG_SPL_CLK=y
> > +# CONFIG_USB_FUNCTION_FASTBOOT is not set
> > +CONFIG_ROCKCHIP_GPIO=y
> > +CONFIG_SYS_I2C_ROCKCHIP=y
> > +CONFIG_MISC=y
> > +CONFIG_SUPPORT_EMMC_RPMB=y
> > +CONFIG_MMC_DW=y
> > +CONFIG_MMC_DW_ROCKCHIP=y
> > +CONFIG_MMC_SDHCI=y
> > +CONFIG_MMC_SDHCI_SDMA=y
> > +CONFIG_MMC_SDHCI_ROCKCHIP=y
> > +CONFIG_SF_DEFAULT_BUS=5
> > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
> > +CONFIG_SPI_FLASH_MACRONIX=y
> > +CONFIG_SPI_FLASH_XTX=y
>
> Ditto.
>
> > +CONFIG_PHYLIB=y
> > +CONFIG_RTL8169=y
> > +CONFIG_NVME_PCI=y
> > +CONFIG_PCIE_DW_ROCKCHIP=y
> > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
> > +CONFIG_PHY_ROCKCHIP_USBDP=y
> > +CONFIG_SPL_PINCTRL=y
> > +CONFIG_PWM_ROCKCHIP=y
> > +CONFIG_SPL_RAM=y
> > +CONFIG_SCSI=y
> > +CONFIG_BAUDRATE=1500000
> > +CONFIG_DEBUG_UART_SHIFT=2
> > +CONFIG_SYS_NS16550_MEM32=y
> > +CONFIG_ROCKCHIP_SFC=y
>
> Ditto.
>
> > +CONFIG_SYSRESET=y
> > +CONFIG_USB=y
> > +CONFIG_USB_XHCI_HCD=y
> > +CONFIG_USB_EHCI_HCD=y
> > +CONFIG_USB_EHCI_GENERIC=y
> > +CONFIG_USB_OHCI_HCD=y
> > +CONFIG_USB_OHCI_GENERIC=y
> > +CONFIG_USB_DWC3=y
> > +CONFIG_USB_DWC3_GENERIC=y
> > +CONFIG_SPL_USB_DWC3_GENERIC=y
> > +CONFIG_USB_HOST_ETHER=y
> > +CONFIG_USB_ETHER_ASIX=y
> > +CONFIG_USB_ETHER_ASIX88179=y
> > +CONFIG_USB_ETHER_LAN75XX=y
> > +CONFIG_USB_ETHER_LAN78XX=y
> > +CONFIG_USB_ETHER_MCS7830=y
> > +CONFIG_USB_ETHER_RTL8152=y
> > +CONFIG_USB_ETHER_SMSC95XX=y
>
> I'm surprised to see USB_ETHER support here? Is this something done on
> purpose? The board already has two 2.5Gbps Ethernet, are they not working?
>
> Cheers,
> Quentin
>
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