[PATCH 4/4] rockchip: rk3568-radxa-e25: Drop PCIe reset-gpios workaround

[Jonas Karlman]

The GPIO0_C3 pin is changed to use func-3 using pcie30x1m0_pins during
probe of pcie3x1. This cause the device to lock-up when pci driver use
the reset-gpios unless the pin is first changed to use gpio pinmux.

Drop the board u-boot.dtsi workaround now that the gpio and pinctrl
drivers automatically use gpio pinmux when a gpio is requested.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
 arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
index 74755a44eaee..00fa0dfee19c 100644
--- a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
@@ -2,18 +2,6 @@
 
 #include "rk356x-u-boot.dtsi"
 
-&pcie3x1 {
-	pinctrl-0 = <&pcie30x1_reset_h>;
-};
-
-&pinctrl {
-	pcie {
-		pcie30x1_reset_h: pcie30x1-reset-h {
-			rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-};
-
 &sdhci {
 	cap-mmc-highspeed;
 	mmc-hs200-1_8v;
-- 
2.43.2