[PATCH 3/9] pinctrl: rockchip: rk3588: Fix support for rockchip_get_mux()

[Jonas Karlman]

GPIO IOMUX control is located at PMU2_IOC or BUS_IOC offset on RK3588.

Based on Linux commit fdc33eba11c5 ("pinctrl/rockchip: add rk3588
support").

Compared to the Linux commit, this include a fix so that the iomux of
GPIO0_B4-D7 is reported correctly.

Signed-off-by: Jonas Karlman <jonas at kwiboo.se>
---
The fix to report correct iomux for GPIO0_B4-D7 will be sent to Linux.
---
 .../pinctrl/rockchip/pinctrl-rockchip-core.c  | 24 ++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 973e6a4f6db9..efc2070d32d9 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -14,10 +14,10 @@
 #include <linux/libfdt.h>
 
 #include "pinctrl-rockchip.h"
+#include <dt-bindings/pinctrl/rockchip.h>
 
 #define MAX_ROCKCHIP_PINS_ENTRIES	30
 #define MAX_ROCKCHIP_GPIO_PER_BANK      32
-#define RK_FUNC_GPIO                    0
 
 static int rockchip_verify_config(struct udevice *dev, u32 bank, u32 pin)
 {
@@ -147,6 +147,28 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
 	if (bank->recalced_mask & BIT(pin))
 		rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask);
 
+	if (IS_ENABLED(CONFIG_ROCKCHIP_RK3588)) {
+		if (bank->bank_num == 0) {
+			if (pin >= RK_PB4 && pin <= RK_PD7) {
+				u32 reg0 = 0;
+
+				reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */
+				ret = regmap_read(regmap, reg0, &val);
+				if (ret)
+					return ret;
+
+				ret = ((val >> bit) & mask);
+				if (ret != 8)
+					return ret;
+
+				reg = reg + 0x8000; /* BUS_IOC_BASE */
+				regmap = priv->regmap_base;
+			}
+		} else if (bank->bank_num > 0) {
+			reg += 0x8000; /* BUS_IOC_BASE */
+		}
+	}
+
 	ret = regmap_read(regmap, reg, &val);
 	if (ret)
 		return ret;
-- 
2.43.2