[GIT PULL] u-boot-riscv/master

Leo Liang ycliang at andestech.com
Tue May 14 15:28:54 CEST 2024


Hi Tom,

The following changes since commit c8ffd1356d42223cbb8c86280a083cc3c93e6426:

  Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" (2024-05-13 09:15:51 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-riscv.git 

for you to fetch changes up to 2b8dc36b4c515979da330a96d9fcc9bbbe5385fa:

  andes: Unify naming policy for Andes related source (2024-05-14 18:50:47 +0800)

CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/20690
----------------------------------------------------------------

- RISC-V: Add NULL check after parsing compatible string
- Board: Add Milk-V Mars CM board
- Andes: Unify naming policy 

----------------------------------------------------------------
Hanyuan Zhao (1):
      riscv: add NULL check before calling strlen in the riscv cpu's get_desc()

Heinrich Schuchardt (6):
      board: starfive: function to read eMMC size
      board: add support for Milk-V Mars CM
      doc: Milk-V Mars CM and Milk-V Mars CM Lite
      configs: visionfive2: enable SPL_YMODEM_SUPPORT
      starfive: add mac vendor sub-command
      riscv: simplify backtrace report

Leo Yu-Chi Liang (1):
      andes: Unify naming policy for Andes related source

 arch/riscv/Kconfig                                 |   4 +-
 arch/riscv/cpu/{andesv5 => andes}/Kconfig          |   4 +-
 arch/riscv/cpu/{andesv5 => andes}/Makefile         |   0
 arch/riscv/cpu/{andesv5 => andes}/cache.c          |  12 +-
 arch/riscv/cpu/{andesv5 => andes}/cpu.c            |   0
 arch/riscv/cpu/{andesv5 => andes}/spl.c            |   0
 arch/riscv/include/asm/arch-jh7110/eeprom.h        |   7 +
 arch/riscv/lib/interrupts.c                        |  16 +-
 board/{AndesTech => andestech}/ae350/Kconfig       |   6 +-
 board/{AndesTech => andestech}/ae350/MAINTAINERS   |   2 +-
 board/{AndesTech => andestech}/ae350/Makefile      |   0
 board/{AndesTech => andestech}/ae350/ae350.c       |   2 +-
 board/starfive/visionfive2/Kconfig                 |   9 +
 board/starfive/visionfive2/spl.c                   |  28 ++-
 board/starfive/visionfive2/starfive_visionfive2.c  |  11 +-
 .../starfive/visionfive2/visionfive2-i2c-eeprom.c  |  43 ++++-
 configs/starfive_visionfive2_defconfig             |   1 +
 doc/board/{AndesTech => andestech}/adp-ag101p.rst  |   0
 doc/board/{AndesTech => andestech}/ae350.rst       |   0
 doc/board/{AndesTech => andestech}/index.rst       |   0
 doc/board/index.rst                                |   2 +-
 doc/board/starfive/index.rst                       |   3 +-
 doc/board/starfive/milk-v_mars_cm.rst              | 193 +++++++++++++++++++++
 drivers/cache/Kconfig                              |   6 +-
 drivers/cache/Makefile                             |   2 +-
 drivers/cache/{cache-v5l2.c => cache-andes-l2.c}   |  40 ++---
 drivers/cpu/riscv_cpu.c                            |   2 +-
 27 files changed, 337 insertions(+), 56 deletions(-)
 rename arch/riscv/cpu/{andesv5 => andes}/Kconfig (91%)
 rename arch/riscv/cpu/{andesv5 => andes}/Makefile (100%)
 rename arch/riscv/cpu/{andesv5 => andes}/cache.c (90%)
 rename arch/riscv/cpu/{andesv5 => andes}/cpu.c (100%)
 rename arch/riscv/cpu/{andesv5 => andes}/spl.c (100%)
 rename board/{AndesTech => andestech}/ae350/Kconfig (91%)
 rename board/{AndesTech => andestech}/ae350/MAINTAINERS (95%)
 rename board/{AndesTech => andestech}/ae350/Makefile (100%)
 rename board/{AndesTech => andestech}/ae350/ae350.c (99%)
 rename doc/board/{AndesTech => andestech}/adp-ag101p.rst (100%)
 rename doc/board/{AndesTech => andestech}/ae350.rst (100%)
 rename doc/board/{AndesTech => andestech}/index.rst (100%)
 create mode 100644 doc/board/starfive/milk-v_mars_cm.rst
 rename drivers/cache/{cache-v5l2.c => cache-andes-l2.c} (84%)

Best regards,
Leo


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