[PATCH 0/5] *** phyCORE-AM62x: DDR detection / Inject DDR timing deltas ***

John Ma jma at phytec.com
Tue May 14 18:26:41 CEST 2024


Tested-by: John Ma <jma at phytec.com>

On 5/7/24 08:17, Wadim Egorov wrote:
> PHYTEC stores details about the hardware in an EEPROM on the SoM. We can
> utilize this information and chose the proper DDR timings accordingly.
>
> Due to the limited SRAM memory on the AM62x, the concept was to store
> only the DDR timings deltas and not their full set, see Patch 4 & 5.
>
> The last patch adds support for a 1 GB and 4 GB RAM variant of the
> phyCORE-AM62x.
>
> Patch 4 & 5 are based on
> https://patchwork.ozlabs.org/project/uboot/list/?series=404273
>
> Wadim Egorov (5):
>    board: phytec: Make AM6 SoM detection depend on I2C
>    board: phytec: Fix function definitions in AM6x SOM detection
>    arm: mach-k3: am625: Call do_board_detect() before DDR probing
>    board: phytec: common: Introduce a method to inject DDR timings deltas
>    board: phytec: am62x: Add support for 1 & 4 GB RAM variants
>
>   arch/arm/mach-k3/am625_init.c                 |   2 +
>   board/phytec/common/Kconfig                   |   2 +
>   board/phytec/common/am6_som_detection.c       |  18 +-
>   board/phytec/common/am6_som_detection.h       |   8 +
>   board/phytec/common/k3/Makefile               |   1 +
>   board/phytec/common/k3/k3_ddrss_patch.c       |  68 ++++++
>   board/phytec/common/k3/k3_ddrss_patch.h       |  28 +++
>   board/phytec/phycore_am62x/MAINTAINERS        |   1 +
>   board/phytec/phycore_am62x/phycore-am62x.c    | 152 ++++++++++++-
>   board/phytec/phycore_am62x/phycore-ddr-data.h | 206 ++++++++++++++++++
>   configs/phycore_am62x_a53_defconfig           |   4 +
>   configs/phycore_am62x_r5_defconfig            |   4 +
>   12 files changed, 483 insertions(+), 11 deletions(-)
>   create mode 100644 board/phytec/common/k3/k3_ddrss_patch.c
>   create mode 100644 board/phytec/common/k3/k3_ddrss_patch.h
>   create mode 100644 board/phytec/phycore_am62x/phycore-ddr-data.h
>


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