[Agilex7 M-series Platform Enablement v1 04/16] arch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series

[tingting.meng at intel.com]

From: Wan Yee Lau <wan.yee.lau at intel.com>

Handoff settings updated for new platform Agilex7 M-series.

Signed-off-by: Wan Yee Lau <wan.yee.lau at intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.chong at intel.com>
Signed-off-by: Tingting Meng <tingting.meng at intel.com>
---
 arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
index d839f28841..747016b436 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_soc64.h
@@ -28,10 +28,20 @@
 #define SOC64_HANDOFF_OFFSET_DATA	0x10
 #define SOC64_HANDOFF_SIZE		4096
 
-#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_STRATIX10) || \
-	IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX)
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_SOC64) || \
+	IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
 #define SOC64_HANDOFF_BASE		0xFFE3F000
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX7M)
+#define SOC64_HANDOFF_MISC		(SOC64_HANDOFF_BASE + 0x62C)
+/* DDR handoff */
+#define SOC64_HANDOFF_MAGIC_DDR	0x5344524D
+#define SOC64_HANDOFF_DDR_BASE	(SOC64_HANDOFF_BASE + 0x610)
+#define SOC64_HANDOFF_DDR_LEN	2
+#define SOC64_HANDOFF_DDR_INTERLEAVING_MODE_MASK	BIT(0)
+#define SOC64_HANDOFF_DDR_MEMORY_TYPE_MASK		BIT(0)
+#else
 #define SOC64_HANDOFF_MISC		(SOC64_HANDOFF_BASE + 0x610)
+#endif
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
 #define SOC64_HANDOFF_BASE		0x0007F000
 #elif IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
-- 
2.25.1