[Agilex7 M-series Platform Enablement v1 15/16] arch: arm: dts: Update Makefile for new platform Agilex7 M-series

[tingting.meng at intel.com]

From: Wan Yee Lau <wan.yee.lau at intel.com>

Update Makefile to support Agilex7 M-series platform enablement.

Signed-off-by: Wan Yee Lau <wan.yee.lau at intel.com>
Signed-off-by: Teik Heng Chong <teik.heng.chong at intel.com>
Signed-off-by: Tingting Meng <tingting.meng at intel.com>
---
 arch/arm/dts/Makefile               |  1 +
 arch/arm/mach-socfpga/Makefile      | 18 ++++++++++++++++++
 board/intel/agilex7m-socdk/Makefile |  7 +++++++
 3 files changed, 26 insertions(+)
 create mode 100644 board/intel/agilex7m-socdk/Makefile

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7b7788f755..c056e0e78e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -547,6 +547,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
 dtb-$(CONFIG_ARCH_SOCFPGA) +=				\
 	socfpga_agilex_socdk.dtb			\
 	socfpga_agilex5_socdk.dtb			\
+	socfpga_agilex7m_socdk.dtb			\
 	socfpga_arria5_secu1.dtb			\
 	socfpga_arria5_socdk.dtb			\
 	socfpga_arria10_chameleonv3_270_2.dtb		\
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 67c6a8dfec..856fd597f6 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -65,6 +65,21 @@ obj-y	+= reset_manager_s10.o
 obj-y	+= wrap_pll_config_soc64.o
 endif
 
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y	+= clock_manager_agilex.o
+obj-y	+= lowlevel_init_soc64.o
+obj-y	+= mailbox_s10.o
+obj-y	+= misc_soc64.o
+obj-y	+= mmu-arm64_s10.o
+obj-y	+= reset_manager_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH)	+= secure_vab.o
+obj-y	+= system_manager_soc64.o
+obj-y	+= timer_s10.o
+obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH)	+= vab.o
+obj-y	+= wrap_handoff_soc64.o
+obj-y	+= wrap_pll_config_soc64.o
+endif
+
 ifdef CONFIG_TARGET_SOCFPGA_N5X
 obj-y	+= clock_manager_n5x.o
 obj-y	+= lowlevel_init_soc64.o
@@ -107,6 +122,9 @@ endif
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX5
 obj-y	+= spl_soc64.o
 endif
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX7M
+obj-y	+= spl_agilex7m.o
+endif
 else
 obj-$(CONFIG_SPL_ATF) += secure_reg_helper.o
 obj-$(CONFIG_SPL_ATF) += smc_api.o
diff --git a/board/intel/agilex7m-socdk/Makefile b/board/intel/agilex7m-socdk/Makefile
new file mode 100644
index 0000000000..ff5d9dde3b
--- /dev/null
+++ b/board/intel/agilex7m-socdk/Makefile
@@ -0,0 +1,7 @@
+
+# Copyright (C) 2024 Intel Corporation <www.intel.com>
+#
+# SPDX-License-Identifier:	GPL-2.0
+#
+
+obj-y	:= socfpga.o
-- 
2.25.1