[PATCH v3 01/12] pci: xilinx: Handle size of ecam region properly

Daniel Schwierzeck daniel.schwierzeck at gmail.com
Sun May 19 19:57:16 CEST 2024



On 5/17/24 20:14, Jiaxun Yang wrote:
> Probe size of ecam from devicetree properly and cap accessible
> bus number accorading to ecam region size to ensure we don't go
> beyond hardware address space.
> 
> Also disable all interrupts to ensure errors are handled silently.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang at flygoat.com>
> ---
>   drivers/pci/pcie_xilinx.c | 53 +++++++++++++++++++++++++++++++++++------------
>   1 file changed, 40 insertions(+), 13 deletions(-)
> 

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>


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