[PATCH v2 5/8] drivers: ram: Kconfig: Add CONFIG_K3_INLINE_ECC
Neha Malcom Francis
n-francis at ti.com
Mon May 20 04:51:32 CEST 2024
Hi Andrew
On 15/05/24 21:37, Andrew Davis wrote:
> On 5/10/24 3:47 AM, Santhosh Kumar K wrote:
>> From: Neha Malcom Francis <n-francis at ti.com>
>>
>> Add CONFIG_K3_INLINE_ECC so that ECC functions can be compiled into R5 SPL
>> only when the config has been enabled.
>>
>> Signed-off-by: Neha Malcom Francis <n-francis at ti.com>
>> ---
>> drivers/ram/Kconfig | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
>> index 9838a2798f92..9d1eee1d5cad 100644
>> --- a/drivers/ram/Kconfig
>> +++ b/drivers/ram/Kconfig
>> @@ -107,6 +107,17 @@ config IMXRT_SDRAM
>> to support external memories like sdram, psram & nand.
>> This driver is for the sdram memory interface with the SEMC.
>> +config K3_INLINE_ECC
>> + bool "Enable TI Inline ECC support"
>> + depends on K3_DDRSS
>> + default n
>
> n is already the default, this line is never needed.
>
Right thanks for catching that!
> Maybe we want this to be `default y` so that we do not change
> current behavior and platforms can opt-out as needed instead.
>
Inline ECC should not be default behavior on our systems, rather those who need
it opt to enable it; since it significantly impacts boot time on systems with
large RAM. So I think we should keep it as default n.
> Andrew
>
>> + help
>> + Enable Inline ECC support on K3 platforms. 1/9th of the SDRAM space
>> + is used for ECC storage and the rest 8/9th is available for system
>> + use. Enabling ECC increases boot time as the ECC protected regions
>> + need to be primed with a predefined value prior to enabling ECC
>> + check.
>> +
>> source "drivers/ram/aspeed/Kconfig"
>> source "drivers/ram/cadence/Kconfig"
>> source "drivers/ram/octeon/Kconfig"
--
Thanking You
Neha Malcom Francis
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