[PATCH 09/10] board: emulation: New board qemu-xtensa
Jiaxun Yang
jiaxun.yang at flygoat.com
Tue May 21 10:20:05 CEST 2024
在2024年5月21日五月 上午8:35,Max Filippov写道:
[...]
>> +++ b/board/emulation/qemu-xtensa/MAINTAINERS
>> @@ -0,0 +1,7 @@
>> +QEMU XTENSA 'VIRT' BOARD
>> +M: Jiaxun Yang <jiaxun.yang at flygoat.com>
>> +S: Maintained
>> +F: board/emulation/qemu-xtensa/
>> +F: board/emulation/common/
>> +F: include/configs/qemu-riscv.h
>
> This must be qemu-xtensa.h, right?
Ah yes :-)
Do you mind me to give you a M: entry?
I'm pretty dumb to Xtensa stuff so it deserves an M from people
know Xtensa better.
[...]
>
> I'm not sure what CFG_SYS_IO_BASE means for the virt machine, but
> it looks like in the noMMU case SDRAM is going to overlap the
> IO range with the above base addresses and sizes. And from QEMU
> monitor I see the following address space distribution in the virt
> machine with a noMMU core:
So CFG_SYS_IO_BASE means physical address left for I/O with 1:1 mapping
from virtual address. for PTP MMU I handled it in:
[PATCH 03/10] xtensa: Implement phys virt conversion for PTP_MMU
Can you confirm if noMMU core is doing the same on VA-PA mapping?
If so, that patch needs to be expanded to include noMMU as well.
Thanks
- Jiaxun
>
> address-space: memory
> 0000000000000000-ffffffffffffffff (prio 0, i/o): system
> 000000003ffe0000-000000003fffffff (prio 0, ram): xtensa.dataram0
> 0000000040000000-000000004001ffff (prio 0, ram): xtensa.instram0
> 0000000050000000-0000000053ffffff (prio 0, ram): xtensa.sysrom0
> 0000000060000000-00000000dfffffff (prio 0, ram): xtensa.sysram0
> 00000000f0000000-00000000f000ffff (prio 0, i/o): alias pcie-pio
> @gpex_ioport_window 0000000000000000-000000000000ffff
> 00000000f0100000-00000000f3ffffff (prio 0, i/o): alias pcie-ecam
> @pcie-mmcfg-mmio 0000000000000000-0000000003efffff
> 00000000f4000000-00000000fbffffff (prio 0, i/o): alias pcie-mmio
> @gpex_mmio_window 00000000f4000000-00000000fbffffff
>
> i.e. there's no IO at the address 0x90000000.
>
> --
> Thanks.
> -- Max
--
- Jiaxun
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