[PATCH 1/7] arm: mach-k3: am62a_qos: Move common bit MACROS to k3_qos header file

[Andrew Davis]

On 5/22/24 6:37 AM, Jayesh Choudhary wrote:
> QoS bit mapping are common across all K3 SoCs so move those defines
> to common header file (k3_qos.h).
> This ensures that we do not define these for each SoC.
> 
> Signed-off-by: Jayesh Choudhary <j-choudhary at ti.com>
> ---
>   arch/arm/mach-k3/include/mach/k3-qos.h | 74 ++++++++++++++++++++++++++
>   arch/arm/mach-k3/r5/am62ax/am62a_qos.h | 74 --------------------------
>   2 files changed, 74 insertions(+), 74 deletions(-)
> 
> diff --git a/arch/arm/mach-k3/include/mach/k3-qos.h b/arch/arm/mach-k3/include/mach/k3-qos.h
> index e00e1de5b9..6ed5704803 100644
> --- a/arch/arm/mach-k3/include/mach/k3-qos.h
> +++ b/arch/arm/mach-k3/include/mach/k3-qos.h
> @@ -9,6 +9,80 @@
>   
>   #include <linux/kernel.h>
>   
> +#define QOS_0	(0 << 0)
> +#define QOS_1	(1 << 0)
> +#define QOS_2	(2 << 0)
> +#define QOS_3	(3 << 0)
> +#define QOS_4	(4 << 0)
> +#define QOS_5	(5 << 0)
> +#define QOS_6	(6 << 0)
> +#define QOS_7	(7 << 0)
> +
> +#define ORDERID_0	(0 << 4)
> +#define ORDERID_1	(1 << 4)
> +#define ORDERID_2	(2 << 4)
> +#define ORDERID_3	(3 << 4)
> +#define ORDERID_4	(4 << 4)
> +#define ORDERID_5	(5 << 4)
> +#define ORDERID_6	(6 << 4)
> +#define ORDERID_7	(7 << 4)
> +#define ORDERID_8	(8 << 4)
> +#define ORDERID_9	(9 << 4)
> +#define ORDERID_10	(10 << 4)
> +#define ORDERID_11	(11 << 4)
> +#define ORDERID_12	(12 << 4)
> +#define ORDERID_13	(13 << 4)
> +#define ORDERID_14	(14 << 4)
> +#define ORDERID_15	(15 << 4)
> +
> +#define ASEL_0	(0 << 8)
> +#define ASEL_1	(1 << 8)
> +#define ASEL_2	(2 << 8)
> +#define ASEL_3	(3 << 8)
> +#define ASEL_4	(4 << 8)
> +#define ASEL_5	(5 << 8)
> +#define ASEL_6	(6 << 8)
> +#define ASEL_7	(7 << 8)
> +#define ASEL_8	(8 << 8)
> +#define ASEL_9	(9 << 8)
> +#define ASEL_10	(10 << 8)
> +#define ASEL_11	(11 << 8)
> +#define ASEL_12	(12 << 8)
> +#define ASEL_13	(13 << 8)
> +#define ASEL_14	(14 << 8)
> +#define ASEL_15	(15 << 8)
> +
> +#define EPRIORITY_0	(0 << 12)
> +#define EPRIORITY_1	(1 << 12)
> +#define EPRIORITY_2	(2 << 12)
> +#define EPRIORITY_3	(3 << 12)
> +#define EPRIORITY_4	(4 << 12)
> +#define EPRIORITY_5	(5 << 12)
> +#define EPRIORITY_6	(6 << 12)
> +#define EPRIORITY_7	(7 << 12)
> +
> +#define VIRTID_0	(0 << 16)
> +#define VIRTID_1	(1 << 16)
> +#define VIRTID_2	(2 << 16)
> +#define VIRTID_3	(3 << 16)
> +#define VIRTID_4	(4 << 16)
> +#define VIRTID_5	(5 << 16)
> +#define VIRTID_6	(6 << 16)
> +#define VIRTID_7	(7 << 16)
> +#define VIRTID_8	(8 << 16)
> +#define VIRTID_9	(9 << 16)
> +#define VIRTID_10	(10 << 16)
> +#define VIRTID_11	(11 << 16)
> +#define VIRTID_12	(12 << 16)
> +#define VIRTID_13	(13 << 16)
> +#define VIRTID_14	(14 << 16)
> +#define VIRTID_15	(15 << 16)


This all seem like it could be made into some macro, something like

#define K3_QOS(qos, orderid, asel, epriority, virtid, atype) \
	(qos     << 0 | \
	 orderid << 4 | \
	 asel    << 8 | \
etc..

Then use that instead of raw values. That might also make it more clear
we are setting the other values to 0 when we are setting these registers:

.val = K3_QOS(0, 15, 0, 0, 0, 3),

Andrew


> +
> +#define ATYPE_0	(0 << 28)
> +#define ATYPE_1	(1 << 28)
> +#define ATYPE_2	(2 << 28)
> +#define ATYPE_3	(3 << 28)
> +
>   struct k3_qos_data {
>   	u32 reg;
>   	u32 val;
> diff --git a/arch/arm/mach-k3/r5/am62ax/am62a_qos.h b/arch/arm/mach-k3/r5/am62ax/am62a_qos.h
> index c74d69a28f..84a6dc7240 100644
> --- a/arch/arm/mach-k3/r5/am62ax/am62a_qos.h
> +++ b/arch/arm/mach-k3/r5/am62ax/am62a_qos.h
> @@ -6,80 +6,6 @@
>    * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
>    */
>   
> -#define QOS_0	(0 << 0)
> -#define QOS_1	(1 << 0)
> -#define QOS_2	(2 << 0)
> -#define QOS_3	(3 << 0)
> -#define QOS_4	(4 << 0)
> -#define QOS_5	(5 << 0)
> -#define QOS_6	(6 << 0)
> -#define QOS_7	(7 << 0)
> -
> -#define ORDERID_0	(0 << 4)
> -#define ORDERID_1	(1 << 4)
> -#define ORDERID_2	(2 << 4)
> -#define ORDERID_3	(3 << 4)
> -#define ORDERID_4	(4 << 4)
> -#define ORDERID_5	(5 << 4)
> -#define ORDERID_6	(6 << 4)
> -#define ORDERID_7	(7 << 4)
> -#define ORDERID_8	(8 << 4)
> -#define ORDERID_9	(9 << 4)
> -#define ORDERID_10	(10 << 4)
> -#define ORDERID_11	(11 << 4)
> -#define ORDERID_12	(12 << 4)
> -#define ORDERID_13	(13 << 4)
> -#define ORDERID_14	(14 << 4)
> -#define ORDERID_15	(15 << 4)
> -
> -#define ASEL_0	(0 << 8)
> -#define ASEL_1	(1 << 8)
> -#define ASEL_2	(2 << 8)
> -#define ASEL_3	(3 << 8)
> -#define ASEL_4	(4 << 8)
> -#define ASEL_5	(5 << 8)
> -#define ASEL_6	(6 << 8)
> -#define ASEL_7	(7 << 8)
> -#define ASEL_8	(8 << 8)
> -#define ASEL_9	(9 << 8)
> -#define ASEL_10	(10 << 8)
> -#define ASEL_11	(11 << 8)
> -#define ASEL_12	(12 << 8)
> -#define ASEL_13	(13 << 8)
> -#define ASEL_14	(14 << 8)
> -#define ASEL_15	(15 << 8)
> -
> -#define EPRIORITY_0	(0 << 12)
> -#define EPRIORITY_1	(1 << 12)
> -#define EPRIORITY_2	(2 << 12)
> -#define EPRIORITY_3	(3 << 12)
> -#define EPRIORITY_4	(4 << 12)
> -#define EPRIORITY_5	(5 << 12)
> -#define EPRIORITY_6	(6 << 12)
> -#define EPRIORITY_7	(7 << 12)
> -
> -#define VIRTID_0	(0 << 16)
> -#define VIRTID_1	(1 << 16)
> -#define VIRTID_2	(2 << 16)
> -#define VIRTID_3	(3 << 16)
> -#define VIRTID_4	(4 << 16)
> -#define VIRTID_5	(5 << 16)
> -#define VIRTID_6	(6 << 16)
> -#define VIRTID_7	(7 << 16)
> -#define VIRTID_8	(8 << 16)
> -#define VIRTID_9	(9 << 16)
> -#define VIRTID_10	(10 << 16)
> -#define VIRTID_11	(11 << 16)
> -#define VIRTID_12	(12 << 16)
> -#define VIRTID_13	(13 << 16)
> -#define VIRTID_14	(14 << 16)
> -#define VIRTID_15	(15 << 16)
> -
> -#define ATYPE_0	(0 << 28)
> -#define ATYPE_1	(1 << 28)
> -#define ATYPE_2	(2 << 28)
> -#define ATYPE_3	(3 << 28)
> -
>   #define PULSAR_UL_WKUP_0_CPU0_RMST	0x45D14000
>   #define PULSAR_UL_WKUP_0_CPU0_WMST	0x45D14400
>   #define PULSAR_UL_WKUP_0_CPU0_PMST	0x45D14800