[PATCH 01/10] rockchip: px30: default TPL_SYS_MALLOC_F_LEN to 0x600 on PX30 Kconfig level
Kever Yang
kever.yang at rock-chips.com
Thu May 23 05:48:02 CEST 2024
On 2024/5/22 01:39, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at cherry.de>
>
> This is the kind of setting that typically doesn't need to be changed
> between boards based on the same SoC, so let's make it the default in
> PX30 Kconfig so we don't have to care about it in the defconfig if we
> don't want to.
>
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>
Thanks,
- Kever
> ---
> arch/arm/mach-rockchip/px30/Kconfig | 3 +++
> configs/evb-px30_defconfig | 1 -
> configs/firefly-px30_defconfig | 1 -
> configs/odroid-go2_defconfig | 1 -
> configs/px30-core-ctouch2-of10-px30_defconfig | 1 -
> configs/px30-core-ctouch2-px30_defconfig | 1 -
> configs/px30-core-edimm2.2-px30_defconfig | 1 -
> configs/ringneck-px30_defconfig | 1 -
> 8 files changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig
> index 23f8f430c4a..e39472604c3 100644
> --- a/arch/arm/mach-rockchip/px30/Kconfig
> +++ b/arch/arm/mach-rockchip/px30/Kconfig
> @@ -83,6 +83,9 @@ config TPL_TEXT_BASE
> config TPL_STACK
> default 0xff0e4fff
>
> +config TPL_SYS_MALLOC_F_LEN
> + default 0x600
> +
> config DEBUG_UART_CHANNEL
> int "Mux channel to use for debug UART2/UART3"
> depends on DEBUG_UART_BOARD_INIT
> diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
> index 07c56a45ec0..73a3c6120e0 100644
> --- a/configs/evb-px30_defconfig
> +++ b/configs/evb-px30_defconfig
> @@ -16,7 +16,6 @@ CONFIG_ROCKCHIP_PX30=y
> CONFIG_TARGET_EVB_PX30=y
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
> index e5377dcdf3d..0a14b393667 100644
> --- a/configs/firefly-px30_defconfig
> +++ b/configs/firefly-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_TARGET_EVB_PX30=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig
> index 99d7149a44c..3c1abb83ed9 100644
> --- a/configs/odroid-go2_defconfig
> +++ b/configs/odroid-go2_defconfig
> @@ -19,7 +19,6 @@ CONFIG_TARGET_ODROID_GO2=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig
> index a2801ec7796..87a39e115df 100644
> --- a/configs/px30-core-ctouch2-of10-px30_defconfig
> +++ b/configs/px30-core-ctouch2-of10-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_TARGET_PX30_CORE=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig
> index cc33e275742..7162c117beb 100644
> --- a/configs/px30-core-ctouch2-px30_defconfig
> +++ b/configs/px30-core-ctouch2-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_TARGET_PX30_CORE=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig
> index 99e1b2fc7ae..1182f60358f 100644
> --- a/configs/px30-core-edimm2.2-px30_defconfig
> +++ b/configs/px30-core-edimm2.2-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_TARGET_PX30_CORE=y
> CONFIG_DEBUG_UART_CHANNEL=1
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig
> index 67a44eda684..0df1b8a59ac 100644
> --- a/configs/ringneck-px30_defconfig
> +++ b/configs/ringneck-px30_defconfig
> @@ -17,7 +17,6 @@ CONFIG_ROCKCHIP_PX30=y
> CONFIG_TARGET_RINGNECK_PX30=y
> CONFIG_TPL_LIBGENERIC_SUPPORT=y
> CONFIG_SPL_DRIVERS_MISC=y
> -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
> CONFIG_SPL_STACK_R_ADDR=0x600000
> CONFIG_SPL_STACK=0x400000
> CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
>
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