[Upstream] [PATCH 3/3] board: phytec: imx93: Add phyCORE-i.MX93 support all SOM variants

Tue Nov 5 08:42:35 CET 2024

Hi Christoph,

Am 04.11.24 um 12:25 schrieb Christoph Stoidner:
> The phyCORE-i.MX 93 is available in various variants (e.g. different ram
> sizes, eMMC HS400 yes/no). Add a new SOM-scoped defconfig that makes use
> of the hardware introspection of the phycore-imx93 board-code, to detect
> the SOM module variant, and to configure the hardware accordingly. The
> resulting SPL and u-boot binary shall able to boot each phyCORE-i.MX93
> module variant on each carrier board.

I think it would be better to simply rename the current 
imx93-phyboard-segin_defconfig to phycore_imx93_defconfig. This is less 
confusing and follows the idea of our other SoMs.

> 
> Signed-off-by: Christoph Stoidner <c.stoidner at phytec.de>
> Cc: Mathieu Othacehe <m.othacehe at gmail.com>, Christoph Stoidner <c.stoidner at phytec.de>, Stefano Babic <sbabic at denx.de>, Fabio Estevam <festevam at gmail.com>, "NXP i.MX U-Boot Team" <uboot-imx at nxp.com>, Tom Rini <trini at konsulko.com>, Yannic Moog <y.moog at phytec.de>, Primoz Fiser <primoz.fiser at norik.com>, Andrej Picej <andrej.picej at norik.com>, Wadim Egorov <w.egorov at phytec.de>
> ---
>   arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi |  14 +-
>   board/phytec/phycore_imx93/MAINTAINERS        |   1 +
>   configs/imx93-phycore_defconfig               | 156 ++++++++++++++++++
>   3 files changed, 169 insertions(+), 2 deletions(-)
>   create mode 100644 configs/imx93-phycore_defconfig
> 
> diff --git a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
> index 25c778bb07..e84476c38a 100644
> --- a/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
> +++ b/arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
> @@ -2,15 +2,25 @@
>   /*
>    * Copyright (C) 2023 PHYTEC Messtechnik GmbH
>    * Christoph Stoidner <c.stoidner at phytec.de>
> + * Copyright (C) 2024 PHYTEC Messtechnik GmbH
>    *
>    * Product homepage:
> - * phyBOARD-Segin carrier board is reused for the i.MX93 design.
> - * https://www.phytec.eu/en/produkte/single-board-computer/phyboard-segin-imx6ul/
> +   https://www.phytec.de/produkte/system-on-modules/phycore-imx-91-93/
>    */
>   
>   #include "imx93-u-boot.dtsi"
>   
>   / {
> +
> +	/*
> +	 * If the u-boot build uses the device tree of a phyCORE-i.MX93 carrier
> +	 * board (i.E. imx93-phyboard-segin.dts), then this u-boot.dtsi
> +	 * deactivates all carrier board-specific peripherals. This means that
> +	 * the resulting SPL and u-boot binary can boot the phyCORE-i.MX 93 module
> +	 * on each carrier board.
> +	 */
This comment does not seem to reflect what 
imx93-phyboard-segin-u-boot.dtsi is actually doing.

> +	model = "PHYTEC phyCORE-i.MX93";
> +
>   	wdt-reboot {
>   		compatible = "wdt-reboot";
>   		wdt = <&wdog3>;
> diff --git a/board/phytec/phycore_imx93/MAINTAINERS b/board/phytec/phycore_imx93/MAINTAINERS
> index cea817ffdc..d6eb5eb287 100644
> --- a/board/phytec/phycore_imx93/MAINTAINERS
> +++ b/board/phytec/phycore_imx93/MAINTAINERS
> @@ -9,5 +9,6 @@ F:      arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi
>   F:      board/phytec/phycore_imx93/
>   F:      board/phytec/common/imx93_som_detection.c
>   F:      board/phytec/common/imx93_som_detection.h
> +F:      configs/imx93-phycore_defconfig
>   F:      configs/imx93-phyboard-segin_defconfig
>   F:      include/configs/phycore_imx93.h
> diff --git a/configs/imx93-phycore_defconfig b/configs/imx93-phycore_defconfig

Looking at the diff between both imx93 configs I can see that 
CONFIG_PHYTEC_SOM_DETECTION is the only relevant differece you added.

The SoM detection should be applied also for the 
imx93-phyboard-segin_defconfig. The detection is not related to anything 
board related.

Why can't we have a single defconfig?

Regards,
Wadim

> new file mode 100644
> index 0000000000..2c818d01b7
> --- /dev/null
> +++ b/configs/imx93-phycore_defconfig
> @@ -0,0 +1,156 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_IMX9=y
> +CONFIG_TEXT_BASE=0x80200000
> +CONFIG_SYS_MALLOC_LEN=0x2000000
> +CONFIG_SYS_MALLOC_F_LEN=0x20000
> +CONFIG_SPL_LIBCOMMON_SUPPORT=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> +CONFIG_NR_DRAM_BANKS=2
> +CONFIG_ENV_SOURCE_FILE="phycore_imx93"
> +CONFIG_ENV_SIZE=0x10000
> +CONFIG_ENV_OFFSET=0x700000
> +CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg"
> +CONFIG_DM_GPIO=y
> +CONFIG_DEFAULT_DEVICE_TREE="imx93-phyboard-segin"
> +CONFIG_SPL_TEXT_BASE=0x2049A000
> +CONFIG_PHYTEC_SOM_DETECTION=y
> +CONFIG_TARGET_PHYCORE_IMX93=y
> +CONFIG_OF_LIBFDT_OVERLAY=y
> +CONFIG_SYS_MONITOR_LEN=524288
> +CONFIG_SPL_SERIAL=y
> +CONFIG_SPL_DRIVERS_MISC=y
> +CONFIG_SPL_STACK=0x20519dd0
> +CONFIG_SPL=y
> +CONFIG_ENV_OFFSET_REDUND=0x720000
> +CONFIG_CMD_DEKBLOB=y
> +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000
> +CONFIG_SYS_LOAD_ADDR=0x80400000
> +CONFIG_SYS_MEMTEST_START=0x80000000
> +CONFIG_SYS_MEMTEST_END=0x90000000
> +CONFIG_REMAKE_ELF=y
> +# CONFIG_ANDROID_BOOT_IMAGE is not set
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_OF_SYSTEM_SETUP=y
> +CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if test ${doraucboot} = 1; then run raucinit; fi; if run loadimage; then run mmcboot; else run netboot; fi; fi;"
> +CONFIG_DEFAULT_FDT_FILE="oftree"
> +CONFIG_SYS_CBSIZE=2048
> +CONFIG_SYS_PBSIZE=2074
> +CONFIG_ARCH_MISC_INIT=y
> +CONFIG_BOARD_LATE_INIT=y
> +CONFIG_SPL_MAX_SIZE=0x26000
> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
> +CONFIG_SPL_BSS_START_ADDR=0x2051a000
> +CONFIG_SPL_BSS_MAX_SIZE=0x2000
> +CONFIG_SPL_BOARD_INIT=y
> +CONFIG_SPL_BOOTROM_SUPPORT=y
> +CONFIG_SPL_LOAD_IMX_CONTAINER=y
> +CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg"
> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040
> +CONFIG_SPL_I2C=y
> +CONFIG_SPL_POWER=y
> +CONFIG_SPL_WATCHDOG=y
> +CONFIG_SYS_PROMPT="u-boot=> "
> +CONFIG_CMD_ERASEENV=y
> +CONFIG_CMD_NVEDIT_EFI=y
> +CONFIG_CRC32_VERIFY=y
> +CONFIG_CMD_EEPROM=y
> +CONFIG_SYS_I2C_EEPROM_BUS=2
> +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
> +CONFIG_SYS_EEPROM_SIZE=4096
> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
> +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
> +CONFIG_CMD_MEMTEST=y
> +CONFIG_CMD_CLK=y
> +CONFIG_CMD_DFU=y
> +CONFIG_CMD_FUSE=y
> +CONFIG_CMD_GPIO=y
> +CONFIG_CMD_I2C=y
> +CONFIG_CMD_MMC=y
> +CONFIG_CMD_POWEROFF=y
> +CONFIG_CMD_USB=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> +CONFIG_CMD_SNTP=y
> +CONFIG_CMD_CACHE=y
> +CONFIG_CMD_EFIDEBUG=y
> +CONFIG_CMD_RTC=y
> +CONFIG_CMD_TIME=y
> +CONFIG_CMD_GETTIME=y
> +CONFIG_CMD_TIMER=y
> +CONFIG_CMD_REGULATOR=y
> +CONFIG_CMD_HASH=y
> +CONFIG_CMD_EXT4_WRITE=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_ENV_OVERWRITE=y
> +CONFIG_ENV_IS_NOWHERE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SYS_MMC_ENV_DEV=1
> +CONFIG_USE_ETHPRIME=y
> +CONFIG_ETHPRIME="eth1"
> +CONFIG_NET_RANDOM_ETHADDR=y
> +CONFIG_SPL_DM=y
> +CONFIG_SYSCON=y
> +CONFIG_SPL_CLK_IMX93=y
> +CONFIG_CLK_IMX93=y
> +CONFIG_CPU=y
> +CONFIG_CPU_IMX=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_IMX_RGPIO2P=y
> +CONFIG_DM_I2C=y
> +CONFIG_SYS_I2C_IMX_LPI2C=y
> +CONFIG_I2C_EEPROM=y
> +CONFIG_SYS_I2C_EEPROM_ADDR=0x50
> +CONFIG_SUPPORT_EMMC_BOOT=y
> +CONFIG_MMC_IO_VOLTAGE=y
> +CONFIG_MMC_UHS_SUPPORT=y
> +CONFIG_MMC_HS400_ES_SUPPORT=y
> +CONFIG_MMC_HS400_SUPPORT=y
> +CONFIG_FSL_USDHC=y
> +CONFIG_PHY_TI_GENERIC=y
> +CONFIG_DM_ETH_PHY=y
> +CONFIG_DWC_ETH_QOS=y
> +CONFIG_DWC_ETH_QOS_IMX=y
> +CONFIG_FEC_MXC=y
> +CONFIG_MII=y
> +CONFIG_MIPI_DPHY_HELPERS=y
> +CONFIG_PHY_IMX93_MIPI_DPHY=y
> +CONFIG_PINCTRL=y
> +CONFIG_SPL_PINCTRL=y
> +CONFIG_PINCTRL_IMX93=y
> +CONFIG_POWER_DOMAIN=y
> +CONFIG_IMX93_BLK_CTRL=y
> +CONFIG_DM_PMIC=y
> +CONFIG_DM_PMIC_PCA9450=y
> +CONFIG_SPL_DM_PMIC_PCA9450=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_PCA9450=y
> +CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_GPIO=y
> +CONFIG_DM_RTC=y
> +CONFIG_DM_SERIAL=y
> +CONFIG_FSL_LPUART=y
> +CONFIG_SPI=y
> +CONFIG_DM_SPI=y
> +CONFIG_SYSRESET=y
> +CONFIG_SPL_SYSRESET=y
> +CONFIG_SYSRESET_WATCHDOG=y
> +CONFIG_DM_THERMAL=y
> +CONFIG_IMX_TMU=y
> +CONFIG_USB=y
> +CONFIG_SPL_USB_HOST=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_GADGET=y
> +CONFIG_SPL_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9
> +CONFIG_USB_GADGET_PRODUCT_NUM=0x0152
> +CONFIG_CI_UDC=y
> +CONFIG_USB_PORT_AUTO=y
> +CONFIG_ULP_WATCHDOG=y
> +CONFIG_LZO=y
> +CONFIG_BZIP2=y