[PATCH next 0/5] rockchip: rk3399: allow to trigger sysreset in TPL

Paul Kocialkowski paulk at sys-base.io
Tue Nov 5 19:45:04 CET 2024


Hi,

Le Tue 05 Nov 24, 16:36, Quentin Schulz a écrit :
> A sysreset-gpio can be provided in an RK3399 platform's Device Tree and
> if U-Boot detects a "warm" boot was done, it'll toggle that GPIO to
> perform a reset of the PMIC, essentially forcing a cold boot to make
> sure there are no non-default values in SoC registers.
> 
> For now, this was only supported in SPL, probably because when this was
> implemented RK3399 (and specifically Puma) didn't have TPL support so
> SPL was the earliest stage. Now that most RK3399 boards (and
> specifically Puma) have TPL enabled, it makes sense to add support for
> triggering this sysreset from it. It brings the following advantages:
> - faster boot time as we don't need to reach SPL to be able to reset the
>   system on a condition we know is already met in TPL,
> - have less code to be impacted by the issue this system reset works
>   around (that is, "unclean" SoC registers after a reboot),
> - less confusion around the reason for restarting. Indeed when done from
>   SPL, the following log can be observed:

Thanks for doing this, I think it makes a lot of sense to have it in the TPL!

Cheers,

Paul

> """
> U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
> Channel 0: DDR3, 666MHz
> BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> Channel 1: DDR3, 666MHz
> BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB
> 256B stride
> Trying to boot from BOOTROM
> Returning to boot ROM...
> 
> U-Boot SPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45 +0100)
> Trying to boot from MMC2
> 
> U-Boot TPL 2025.01-rc1-00165-gd79216ca9878-dirty (Nov 05 2024 - 15:31:45)
> """
> 
> possibly hinting at an issue within the SPL when loading the fitImage
> from MMC2 instead of the normal course of events (a system reset).
> 
> For this to be possible, the sysreset function is adapted to be able to
> run in SPL and TPL by checking the appropriate symbols and a weak
> callback is added in the TPL main C code so that we can hook this
> sysreset function within the TPL code path.
> 
> @Cc Paul since he's trying to add support for this sysreset to the
> Firefly ROC-RK3399-PC[1] and Pine64 ROCKPro64[2]. You'll want to have
> gpio1 with boopth-pre-sram though so it makes it to the TPL DTB.
> 
> [1] https://lore.kernel.org/u-boot/20240926183111.1324284-1-paulk@sys-base.io/
> [2] https://lore.kernel.org/u-boot/20240926183111.1324284-2-paulk@sys-base.io/
> 
> Signed-off-by: Quentin Schulz <quentin.schulz at cherry.de>
> ---
> Quentin Schulz (5):
>       pinctrl: rockchip: allow to build for TPL
>       rockchip: rk3399: merge CRU check within rk3399_force_power_on_reset
>       rockchip: tpl: allow to call board/SoC-specific code before DRAM init
>       rockchip: rk3399: allow to handle sysreset-gpio in TPL
>       rockchip: configs: puma-rk3399: do the system reset in TPL
> 
>  arch/arm/mach-rockchip/rk3399/rk3399.c | 58 +++++++++++++++++++---------------
>  arch/arm/mach-rockchip/tpl.c           |  6 ++++
>  configs/puma-rk3399_defconfig          |  3 ++
>  drivers/pinctrl/Kconfig                |  8 +++++
>  drivers/pinctrl/rockchip/Kconfig       |  7 ++++
>  5 files changed, 56 insertions(+), 26 deletions(-)
> ---
> base-commit: 56accc56b9aab87ef4809ccc588e1257969cd271
> change-id: 20241105-rk3399-sysreset-gpio-tpl-50620781cdd9
> 
> Best regards,
> -- 
> Quentin Schulz <quentin.schulz at cherry.de>
> 

-- 
Paul Kocialkowski,

Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/

Specialist in multimedia, graphics and embedded hardware support with Linux.
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