[PATCH] cadence_qspi: Update the delays for flash reset
Venkatesh Yadav Abbarapu
venkatesh.abbarapu at amd.com
Thu Nov 14 06:15:47 CET 2024
Updating the delays for flash reset in the mini u-boot case.
These experimental delay values by looking at different flash device
vendors datasheets.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu at amd.com>
---
drivers/spi/cadence_ospi_versal.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c
index 222f828f54..05ddaf5858 100644
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -197,15 +197,15 @@ int cadence_qspi_versal_flash_reset(struct udevice *dev)
/* Disable Tri-state */
writel((readl(BANK0_TRI) & ~BIT(FLASH_RESET_GPIO)), BANK0_TRI);
- udelay(1);
+ udelay(5);
/* Set value 0 to pin */
writel((readl(BANK0_OUTPUT) & ~BIT(FLASH_RESET_GPIO)), BANK0_OUTPUT);
- udelay(10);
+ udelay(150);
/* Set value 1 to pin */
writel((readl(BANK0_OUTPUT) | BIT(FLASH_RESET_GPIO)), BANK0_OUTPUT);
- udelay(10);
+ udelay(1200);
return 0;
}
--
2.17.1
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